M30802FCGP#D3 Renesas Electronics America, M30802FCGP#D3 Datasheet - Page 45

• Manufacturer Part Number: M30802FCGP#D3
• Description: IC M16C MCU FLASH 128K 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/80r

Specifications of M30802FCGP#D3

• Core Processor: M16C/80
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 121
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

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Table 7.3 Each processor mode and port function
6
Note 1:The default after a reset is the separate bus configuration, and "Full CS space multiplex bus" cannot be selected in
Note 2: Address bus in separate bus configuration.
Note 3: The ALE output pin is selected using bits 4 and 5 of the processor mode register 1.
Note 4: When you have selected use of the DRAM controller and you access the DRAM area, these are CASL, CASH, DW, and
Note 5: The CS signal and address bus selection are set by the external area mode.
Data bus width
BYTE pin level
1 .
0
C
P0
P2
P3
P5
P5
Multiplexed
P1
P4
P4
P4
P5
P5
P5
Processor
9
bus space
0 .
select bit
8 /
B
mode
0
0
0
0
0
5
0
4
7
4
6
7
0
0
0
to P0
to P2
to P3
to P4
to P5
to P1
to P4
1
A
microprocessor mode. When you select "Full CS space multiplex bus" in extended memory mode, the address bus
operates with 64 Kbytes boundaries for each chip select.
BCLK outputs.
8
G
u
7
o r
. g
0 -
7
7
7
3
6
3
7
u
1
0
p
0
, 2
Single-chip
0
I/O port
I/O port
I/O port
I/O port
I/O port
I/O port
I/O port
I/O port
I/O port
I/O port
I/O port
I/O port
2
mode
0
0
5
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Address bus
/data bus
Address bus
I/O port
Data bus
HLDA(Note 3)
Address bus
CS (chip select) or address bus (A
Outputs RD, WRL, WRH and BCLK, or RD, BHE, WR and BCLK
HOLD
RAS (Note 3)
RDY
area is 8 bits
CS (chip select) or address bus (A
(Note 2)
All external
CS1 or CS2 : multiplexed
bus, and the other :
separate bus
f o
(For details, refer to “Bus control”) (Note 5)
(For details, refer to “Bus control”) (Note 5)
(For details, refer to “Bus control”) (Note 3,4)
Memory expansion mode/microprocessor modes
“01”, “10”
3
2
9
Address bus
/data bus
Address bus
/data bus
Some external
HLDA(Note 3) HLDA(Note 3) HLDA(Note 3)
area is 16 bits
Data bus
Data bus
Address bus
HOLD
RAS (Note 3)
RDY
(Note 2)
(Note 2)
I/O port
Address bus
Address bus
HOLD
area is 8 bits
Address bus
RAS (Note 3)
RDY
Data bus
All external
23
20
)
to A
22
Separate bus
)
“00”
Some external
Data bus
Address bus
Address bus
area is 16 bits
Address bus
HOLD
RAS (Note 3)
RDY
Data bus
HLDA(Note 3) HLDA(Note 3)
Address bus
I/O port
Address bus
/data bus
area is 8 bits
I/O port
HOLD
RAS (Note 3)
RDY
I/O port
All external
All space multiplexed
expansion mode
“11” (Note 1)
Memory
bus
I/O port
I/O port
Address bus
/data bus
RAS (Note 3)
I/O port
HOLD
RDY
Some external
Address bus
/data bus
area is 16 bits
7. Bus