M30802FCGP#D3 Renesas Electronics America, M30802FCGP#D3 Datasheet - Page 298

• Manufacturer Part Number: M30802FCGP#D3
• Description: IC M16C MCU FLASH 128K 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/80r

Specifications of M30802FCGP#D3

• Core Processor: M16C/80
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 121
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

M
R
R
e
E
1
v
J
6
1 .
0
C
Data Protect Function (Block Lock)
Status Register
9
0 .
8 /
B
Each block in Figure 29.3 has a nonvolatile lock bit to specify that the block be protected (locked) against
erase/write. The lock bit program command is used to set the lock bit to 0 (locked). The lock bit of each
block can be read out using the read lock bit status command.
Whether block lock is enabled or disabled is determined by the status of the lock bit and how the flash
memory control register 0’s lock bit disable bit is set.
The status register indicates the operating status of the flash memory and whether an erase or program
operation has terminated normally or in an error. The content of this register can be read out by only
writing the read status register command (70
The status register is cleared by writing the Clear Status Register command (50
After a reset, the status register is set to “80
Each bit in this register is explained below.
0
0
0
Write state machine (WSM) status (SR7)
Erase status (SR5)
1
(1) When the lock bit disable bit = 0, a specified block can be locked or unlocked by the lock bit status
(2) When the lock bit disable bit = 1, all blocks are nonlocked regardless of the lock bit data, so they are
A
G
8
After power-on, the write state machine (WSM) status is set to 1.
The write state machine (WSM) status indicates the operating status of the device, as for output on the
RY/BY pin. This status bit is set to 0 during auto write or auto erase operation and is set to 1 upon
completion of these operations.
The erase status informs the operating status of auto erase operation to the CPU. When an erase
error occurs, it is set to 1.
The erase status is reset to 0 when cleared.
u
7
o r
(lock bit data). Blocks whose lock bit data = 0 are locked, so they are disabled against erase/write.
On the other hand, the blocks whose lock bit data = 1 are not locked, so they are enabled for erase/
write.
enabled for erase/write. In this case, the lock bit data that is 0 (locked) is set to 1 (nonlocked) after
erasure, so that the lock bit-actuated lock is removed.
. g
0 -
u
1
____
0
p
0
, 2
0
2
0
0
5
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f o
3
2
9
16
16
.”
). Table 30.2 details the status register.
30. CPU Rewrite Mode
16
).