M30802FCGP#D3 Renesas Electronics America, M30802FCGP#D3 Datasheet - Page 204

• Manufacturer Part Number: M30802FCGP#D3
• Description: IC M16C MCU FLASH 128K 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/80r

Specifications of M30802FCGP#D3

• Core Processor: M16C/80
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 121
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

M
R
R
e
E
1
v
J
6
1 .
0
C
(4) Function select register B
(5) Function select register C
(6) Pull-up control registers
(7) Port control register
9
0 .
8 /
B
Figures 26.10 and 26.11 show the function select registers B.
This register selects the 1st peripheral function output and second peripheral function output when mul-
tiple peripheral function outputs are assigned to a pin. For pins with a third peripheral function, this regis-
ter selects whether to enable the function select register C, or output the second peripheral function.
Each bit of this register corresponds to each pin that has multiple peripheral function outputs assigned to it.
This register is enabled when the bits of the corresponding function select register A are set for peripheral
functions.
The bit 3 to bit 6 of function select register B3 is ignored bit for input peripheral function. When using DA0/
DA1 and ANEX0/ANEX1, set related bit to "1". When not using DA0/DA1 or ANEX0/ANEX1, set related
bit to "0".
Figure 26.12 shows the function select register C.
This register is used to select the first peripheral function output and the third peripheral function output
when three peripheral function outputs are assigned to a pin.
This register is effective when the bits of the function select register A of the counterpart pin have selected
a peripheral function and when the function select register B has made effective the function select
register C.
The bit 7 (PSC_7) is assigned the key-in interrupt inhibit bit. Setting 1 in the key-in interrupt inhibit bit
causes no key-in interrupts regardless of the settings in the interrupt control register even if L is entered
in pins KI
if the port direction register is set to input mode.
Figures 26.13 and 26.14 show the pull-up control registers.
The pull-up control register can be set to apply a pull-up resistance to each block of 4 ports. When ports
are set to have a pull-up resistance, the pull-up resistance is connected only when the direction register is
set for input.
Since P0 to P5 operate as the bus in memory expansion mode and microprocessor mode, do not set the
pull-up control register. However, it is possible to select pull-up resistance presence to the usable port as
I/O port by setting.
Figure 26.15 shows the port control register.
This register is used to choose whether to make port P1 a CMOS port or an Nch open drain. In the Nch
open drain, the port P1 has no function that a complete open drain but keeps the CMOS port’s Pch
always turned off. Thus the absolute maximum rating of the input voltage falls within the range from - 0.3
V to Vcc + 0.3 V.
The port control register functions similarly to the above also in the case in which port P1 can be used as
a port when the bus width in the full external areas comprises 8 bits in either microprocessor mode or in
memory expansion mode.
0
0
0
1
A
G
8
u
7
o r
. g
0 -
u
1
0
p
0
, 2
0
0
to KI
2
0
0
5
3
. With 1 set in the key-in interrupt inhibit bit, input from a port pin cannot be effected even
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3
2
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26. Programmable I/O Ports