M30802FCGP#D3 Renesas Electronics America, M30802FCGP#D3 Datasheet - Page 349

• Manufacturer Part Number: M30802FCGP#D3
• Description: IC M16C MCU FLASH 128K 144LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/80r

Specifications of M30802FCGP#D3

• Core Processor: M16C/80
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 121
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 10K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

M
1
6
Version
C
8 /
0
G
o r
Page 78 Figure 1.11.2
Page 80 Figure 1.11.4
Page 81 Figure 1.11.5
Page 85 Line 9 addition
Page 87 Fugure 1.12.1
Page 88 Fugure 1.12.2
Page 93 Table 1.13.2
Page 95 Figure 1.13.7
Page 102 Figure 1.14.3
Page 104 Table 1.14.2
Page 124 Figure 1.16.5
Page 126-127 Figure 1.16.7 to 1.16.8
Page 130 Figure 1.16.11 SDHI Enabled <--> Disabled
Page 144
Page 146 Table 1.19.1
Page 147 Figure 1.19.1 è„Figure
Page 149 Figure 1.19.4
Page 150 Table 1.20.1
Page 156 Figure 1.20.4
Page 163, 165-169 Figure 1.21.2-Figure 1.21.8 ADCON1 Note 2-6 addition
Page 170 Line 14,23 addition
Page 171 Line 5 addition
Page 172 Figure 1.22.3
Page 176 Figure 1.24.3
Page 178 Figure 1.25.1 Note 1 position change
Page 178 Line 10 DRAM controler --> addition
Page 179 Figure 1.25.2 Note 1 --> change
Page 184 (1) Direction registers, (2) Port registers --> change
Page 185 (4) Function select register B --> change
Page 189 Figure 1.26.4
Page 190 Figure 1.26.5
Page 191 Table 1.26.1
Page 192 Figure 1.26.6
Page 194 Figure 1.26.8
Page 195 Figure 1.26.9
Page 196 Figure 1.26.13
Page 197 Figure 1.26.4
Page 200 Precaution on A/D converter (6) --> addition
Page 203 Stop Mode and Wait Mode (2) all clock stop bits --> all clock stop control bits
Page 203 Noise addition
Page 203 Precaution on interrupt (1) line 7 --> addition
u
p
DMAi, DSAi, DRAi Transfer count specification "(16 Mbytes area)" addition
DRAi memory address counter --> memory address register
or underflows , TAj overflows or underflows
A "L" level returns from TxD due to the occurrence of a parity error. --> A "L" level
returns from SIM card...
Note 1 --> addition, PSL3_3-PSL3_6 change
(a) Separate CTS/RTS pins function (UART0)
b4-b0 When read, the value is "0" --> indeterminate
_______ _______
Note :6 OR instruction --> OR instruction etc.
DRCi • Transfer counter --> • Transfer count register
(1) Internal factors, (2) External factors change
"Timer B2 overflow" addition
Timer A --> Timer B2 overflow (to timer A count source)
Cout source • TB2 overflows, TAj overflows --> •TB2 overflows
When using two-phase signal processing Note 3 --> addition
TBSR When reset 00
Cout source • TBj overflows --> •TBj overflows or underflows
UiTB Note 1 delate
Addition in "Other things"
Note addition
Note 1: LSB first --> MSB first, Note 3 Change
4 to 5 cycles --> 3 to 6 cycles
Note :3 D/A control register --> D/A register
Port Pi direction register Note 2 addition
Port Pi register Note 1 and 2 addition
Note addition
Function select register A1 Note 1 addition
Function select register B1 Note 2 addition
Function select register B3
Port control register Note 2 addition
Port Pi direction register Note 2 addition
Contents for change
CRD change
C- 7
16
--> 000XXXXXX
16
Revision History
Revision
date