M42800A Atmel Corporation, M42800A Datasheet - Page 103

• Manufacturer Part Number: M42800A
• Manufacturer: Atmel Corporation

Specifications of M42800A

• Flash (kbytes): 0 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 33 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 54
• Ext Interrupts: 54
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 8
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.3/5.0
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

15.9
Register Name:
Access Type:
Offset:
This register is used to enable individual pins to be controlled by the PIO Controller instead of the associated peripheral.
When the PIO is enabled, the associated peripheral (if any) is held at logic zero.
0 = No effect.
1 = Enables the PIO to control the corresponding pin (disables peripheral control of the pin).
15.10 PIO Disable Register
Register Name:
Access Type:
Offset:
This register is used to disable PIO control of individual pins. When the PIO control is disabled, the normal peripheral func-
tion is enabled on the corresponding pin.
0 = No effect.
1 = Disables PIO control (enables peripheral control) on the corresponding pin.
1779D–ATARM–14-Apr-06
P31
P23
P15
P31
P23
P15
P7
P7
31
23
15
31
23
15
7
7
PIO Enable Register
P30
P22
P14
P30
P22
P14
P6
P6
PIO_PER
Write-only
0x00
30
22
14
PIO_PDR
Write-only
0x04
30
22
14
6
6
P29
P21
P13
P29
P21
P13
29
21
13
P5
29
21
13
P5
5
5
P28
P20
P12
P28
P20
P12
28
20
12
P4
28
20
12
P4
4
4
P27
P19
P11
P27
P19
P11
27
19
11
P3
27
19
11
P3
3
3
P26
P18
P10
P26
P18
P10
P2
P2
26
18
10
26
18
10
2
2
AT91M42800A
P25
P17
P25
P17
P9
P1
P9
P1
25
17
25
17
9
1
9
1
P24
P16
P24
P16
P8
P0
P8
P0
24
16
24
16
8
0
8
0
103