M42800A Atmel Corporation, M42800A Datasheet - Page 28

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M42800A

Manufacturer Part Number
M42800A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of M42800A

Flash (kbytes)
0 Kbytes
Pin Count
144
Max. Operating Frequency
33 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
54
Ext Interrupts
54
Usb Speed
No
Usb Interface
No
Spi
2
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
8
Self Program Memory
NO
External Bus Interface
1
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.3/5.0
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
28
AT91M42800A
Figure 11-6. Memory Connection for 2 x 8-bit Data Buses
Byte Select Access is used to connect 16-bit devices in a memory page.
Figure 11-7 shows how to connect a 16-bit device with byte and half-word access (e.g., 16-bit
SRAM) on NCS2.
Figure 11-7. Connection for a 16-bit Data Bus with Byte and Half-word Access
Figure 11-8 shows how to connect a 16-bit device without byte access (e.g., Flash) on NCS2.
• The signal A0/NLB is used as NLB and enables the lower byte for both read and write
• The signal NWR1/NUB is used as NUB and enables the upper byte for both read and write
• The signal NWR0/NWE is used as NWE and enables writing for byte or half-word.
• The signal NRD/NOE is used as NOE and enables reading for byte or half-word.
operations.
operations.
EBI
EBI
D8 - D15
A1 - A19
D8 - D15
A1 - A19
D0 - D7
D0 - D7
NWR1
NWR0
NCS2
NCS2
NRD
NWE
NOE
NUB
NLB
A0
D0 - D7
A0 - A18
Write Enable
Read Enable
Memory Enable
D8 - D15
A0 - A18
Write Enable
Read Enable
Memory Enable
D0 - D7
D8 - D15
A0 - A18
Low Byte Enable
High Byte Enable
Write Enable
Output Enable
Memory Enable
1779D–ATARM–14-Apr-06

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