M42800A Atmel Corporation, M42800A Datasheet - Page 85

• Manufacturer Part Number: M42800A
• Manufacturer: Atmel Corporation

Specifications of M42800A

• Flash (kbytes): 0 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 33 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 54
• Ext Interrupts: 54
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 8
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.3/5.0
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

14.9
1779D–ATARM–14-Apr-06
Action
Calculate active interrupt (higher than current or spurious)
Determine and return the vector of the active interrupt
Memorize interrupt
Push on internal stack the current priority level
Acknowledge the interrupt
No effect
Protect Mode
(2)
(1)
behavior by writing to the AIC_EOICR (End of Interrupt) before returning to the interrupted
software. It also can perform other operation(s), e.g., trace possible undesirable behavior.
The Protect Mode permits reading of the Interrupt Vector Register without performing the
associated automatic operations. This is necessary when working with a debug system.
When a Debug Monitor or an ICE reads the AIC User Interface, the IVR could be read. This
would have the following consequences in normal mode.
In either case, an End of Interrupt command would be necessary to acknowledge and to
restore the context of the AIC. This operation is generally not performed by the debug system.
Hence the debug system would become strongly intrusive, and could cause the application to
enter an undesired state.
This is avoided by using Protect mode.
The Protect mode is enabled by setting the AIC bit in the SF Protect Mode Register (see
Special Function Registers” on page
When Protect mode is enabled, the AIC performs interrupt stacking only when a write access
is performed on the AIC_IVR. Therefore, the Interrupt Service Routines must write (arbitrary
data) to the AIC_IVR just after reading it.
The new context of the AIC, including the value of the Interrupt Status Register (AIC_ISR), is
updated with the current interrupt only when IVR is written.
An AIC_IVR read on its own (e.g., by a debugger), modifies neither the AIC context nor the
AIC_ISR.
Extra AIC_IVR reads performed in between the read and the write can cause unpredictable
results. Therefore, it is strongly recommended not to set a breakpoint between these two
actions, nor to stop the software.
The debug system must not write to the AIC_IVR as this would cause undesirable effects.
The following table shows the main steps of an interrupt and the order in which they are per-
formed according to the mode:
Notes:
• If an enabled interrupt with a higher priority than the current one is pending, it is stacked.
• If there is no enabled pending interrupt, the spurious vector is returned.
1. NIRQ de-assertion and automatic interrupt clearing if the source is programmed as level
2. Software that has been written and debugged using Protect mode will run correctly in Nor-
sensitive.
mal mode without modification. However, in Normal mode, the AIC_IVR write has no effect
and can be removed to optimize the code.
115).
Read AIC_IVR
Read AIC_IVR
Read AIC_IVR
Read AIC_IVR
Read AIC_IVR
Write AIC_IVR
Normal Mode
AT91M42800A
Read AIC_IVR
Read AIC_IVR
Read AIC_IVR
Write AIC_IVR
Write AIC_IVR
Protect Mode
–
”SF:
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