M42800A Atmel Corporation, M42800A Datasheet - Page 76

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M42800A

Manufacturer Part Number
M42800A
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of M42800A

Flash (kbytes)
0 Kbytes
Pin Count
144
Max. Operating Frequency
33 MHz
Cpu
ARM7TDMI
Hardware Qtouch Acquisition
No
Max I/o Pins
54
Ext Interrupts
54
Usb Speed
No
Usb Interface
No
Spi
2
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
8
Self Program Memory
NO
External Bus Interface
1
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.3/5.0
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
6
Input Capture Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
No
13.8
Register Name:
Access Type:
Offset:
Reset Value:
• RTPRES: Real-time Timer Prescaler Value
Defines the number of SLCK periods required to increment the Real-time Timer. The maximum period is obtained by pro-
gramming RTPRES to 0x0 corresponding to 65536 Slow Clock cycles.
13.9
Register Name:
Access Type:
Offset:
• PITS: Period Interval Timer Status
0 = The Period Interval Timer has not reached 0 since the last read of the Status Register.
1 = The Period Interval Timer has reached 0 since the last read of the Status Register.
• WDOVF: Watchdog Overflow
0 = The Watchdog Timer has not reached 0 since the last read of the Status Register.
1 = The Watchdog Timer has reached 0 since the last read of the Status Register.
• RTTINC: Real-time Timer Increment
0 = The Real-time Timer has not been incremented since the last read of the Status Register.
1 = The Real-time Timer has been incremented since the last read of the Status Register.
• ALMS: Alarm Status
0 = No alarm compare has been detected since the last read of the Status Register.
1 = Alarm compare has been detected since the last read of the Status Register.
76
31
23
15
31
23
15
7
7
System Timer Real-time Mode Register
System Timer Status Register
AT91M42800A
ST_RTMR
Read/Write
0x0C
0x0000 8000
30
22
14
ST_SR
Read-only
0x10
30
22
14
6
6
29
21
13
29
21
13
5
5
28
20
12
28
20
12
4
4
RTPRES
RTPRES
ALMS
27
19
11
27
19
11
3
3
RTTINC
26
18
10
26
18
10
2
2
WDOVF
25
17
25
17
9
1
9
1
1779D–ATARM–14-Apr-06
PITS
24
16
24
16
8
0
8
0

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