M42800A Atmel Corporation, M42800A Datasheet - Page 133

• Manufacturer Part Number: M42800A
• Manufacturer: Atmel Corporation

Specifications of M42800A

• Flash (kbytes): 0 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 33 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 54
• Ext Interrupts: 54
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 8
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.3/5.0
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Access Type:
Offset:
Reset Value:
• USCLKS: Clock Selection (Baud Rate Generator Input Clock)
• CHRL: Character Length
Start, stop and parity bits are added to the character length.
• SYNC: Synchronous Mode Select (Code Label US_SYNC)
0 = USART operates in Asynchronous Mode.
1 = USART operates in Synchronous Mode.
• PAR: Parity Type
• NBSTOP: Number of Stop Bits
1779D–ATARM–14-Apr-06
0
0
0
0
1
1
31
23
15
–
–
7
0
0
1
1
0
0
1
1
CHMODE
USCLKS
CHRL
CHRL
PAR
0
0
1
1
0
1
30
22
14
Read/Write
0x04
0x0
–
–
6
0
1
0
1
0
1
0
1
0
1
0
1
x
x
Selected Clock
MCK
MCK/8
Slow Clock
External (SCK)
Character Length
Five bits
Six bits
Seven bits
Eight bits
Parity Type
Even Parity
Odd Parity
Parity forced to 0 (Space)
Parity forced to 1 (Mark)
No parity
Multi-drop mode
29
21
13
–
–
5
NBSTOP
USCLKS
28
20
12
–
–
4
27
19
11
–
–
3
–
CLKO
PAR
26
18
10
–
2
–
Code Label: US_CLKS
US_CLKS_MCK
US_CLKS_MCK8
US_CLKS_SLCK
US_CLKS_SCK
Code Label: US_CHRL
US_CHRL_5
US_CHRL_6
US_CHRL_7
US_CHRL_8
Code Label: US_PAR
US_PAR_EVEN
US_PAR_ODD
US_PAR_SPACE
US_PAR_MARK
US_PAR_NO
US_PAR_MULTIDROP
AT91M42800A
MODE9
25
17
–
9
1
–
SYNC
24
16
–
–
8
0
–
133