M42800A Atmel Corporation, M42800A Datasheet - Page 141

• Manufacturer Part Number: M42800A
• Manufacturer: Atmel Corporation

Specifications of M42800A

• Flash (kbytes): 0 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 33 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 54
• Ext Interrupts: 54
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 8
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.3/5.0
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

17.16 USART Channel Status Register
Name:
Access Type:
Offset:
Reset Value:
• RXRDY: Receiver Ready (Code Label US_RXRDY)
0 = No complete character has been received since the last read of the US_RHR or the receiver is disabled. If characters
were being received when the receiver was disabled, RXRDY changes to 1 when the receiver is enabled.
1 = At least one complete character has been received and the US_RHR has not yet been read.
• TXRDY: Transmitter Ready (Code Label US_TXRDY)
0 = A character is in the US_THR waiting to be transferred to the Transmit Shift Register, or an STTBRK command has
been requested, or the transmitter is disabled. As soon as the transmitter is enabled, TXRDY becomes 1.
1 = US_THR is empty and there is no Break request pending TSR availability.
Equal to zero when the USART is disabled or at reset. Transmitter Enable command (in US_CR) sets this bit to one.
• RXBRK: Break Received/End of Break (Code Label US_RXBRK)
0 = No Break Received nor End of Break detected since the last “Reset Status Bits” command in the Control Register.
1 = Break Received or End of Break detected since the last “Reset Status Bits” command in the Control Register.
• ENDRX: End of Receive Transfer (Code Label US_ENDRX)
0 = The End of Transfer signal from the Peripheral Data Controller channel dedicated to the receiver is inactive.
1 = The End of Transfer signal from the Peripheral Data Controller channel dedicated to the receiver is active.
• ENDTX: End of Transmit Transfer (Code Label US_ENDTX)
0 = The End of Transfer signal from the Peripheral Data Controller channel dedicated to the transmitter is inactive.
1 = The End of Transfer signal from the Peripheral Data Controller channel dedicated to the transmitter is active.
• OVRE: Overrun Error (Code Label US_OVRE)
0 = No byte has been transferred from the Receive Shift Register to the US_RHR when RxRDY was asserted since the last
“Reset Status Bits” command.
1 = At least one byte has been transferred from the Receive Shift Register to the US_RHR when RxRDY was asserted
since the last “Reset Status Bits” command.
• FRAME: Framing Error (Code Label US_FRAME)
0 = No stop bit has been detected low since the last “Reset Status Bits” command.
1 = At least one stop bit has been detected low since the last “Reset Status Bits” command.
• PARE: Parity Error (Code Label US_PARE)
1 = At least one parity bit has been detected false (or a parity bit high in multi-drop mode) since the last “Reset Status Bits”
command.
0 = No parity bit has been detected false (or a parity bit high in multi-drop mode) since the last “Reset Status Bits”
command.
1779D–ATARM–14-Apr-06
COMMRX
PARE
31
23
15
–
–
7
COMMTX
FRAME
30
22
14
US_CSR
Read-only
0x14
0x18
–
–
6
OVRE
29
21
13
–
–
–
5
ENDTX
28
20
12
–
–
–
4
ENDRX
27
19
11
–
–
–
3
RXBRK
26
18
10
–
–
–
2
AT91M42800A
TXEMPTY
TXRDY
25
17
–
–
9
1
TIMEOUT
RXRDY
24
16
–
–
8
0
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