M42800A Atmel Corporation, M42800A Datasheet - Page 55

• Manufacturer Part Number: M42800A
• Manufacturer: Atmel Corporation

Specifications of M42800A

• Flash (kbytes): 0 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 33 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 54
• Ext Interrupts: 54
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 8
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.3/5.0
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

12. PMC: Power Management Controller
12.1
1779D–ATARM–14-Apr-06
Oscillator and Slow Clock
The AT91M42800A’s Power Management Controller optimizes the power consumption of the
device. The PMC controls the clocking elements such as the oscillator and the PLLs, and the
System and the Peripheral Clocks. It also controls the MCKO pin and enables the user to
select four different signals to be driven on this pin.
The AT91M42800A has the following clock elements:
The on-chip low-power oscillator together with the PLL-based frequency multiplier and the
prescaler results in a programmable clock between 500 Hz and 66 MHz. It is the responsibility
of the user to make sure that the PMC programming does not result in a clock over the accept-
able limits.
Figure 12-1. Oscillator, PLL and Clock Sources
The integrated oscillator generates the Slow Clock. It is designed for use with a 32.768 kHz
fundamental crystal. A 38.4 kHz crystal can be used. The bias resistor is on-chip and the oscil-
lator integrates an equivalent load capacitance equal to 10 pF.
• The oscillator, which provides a clock that depends on the crystal fundamental frequency
• PLL A, which provides a low-to-middle frequency clock range
• PLL B, which provides a middle-to-high frequency range
• The Clock prescaler
• The System Clock controller
• The Peripheral Clock controller
• The Master Clock Output controller
connected between the XIN and XOUT pins
PLLRCA
PLLRCB
XOUT
XIN
Oscillator
32 kHz
PLLA
PLLB
User Interface
APB Bus
Management
Controller
Power
AT91M42800A
Slow Clock (SLCK)
Main Clock (MCK)
ARM Core Clock
Peripheral
Clocks
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