M42800A Atmel Corporation, M42800A Datasheet - Page 112

• Manufacturer Part Number: M42800A
• Manufacturer: Atmel Corporation

Specifications of M42800A

• Flash (kbytes): 0 Kbytes
• Pin Count: 144
• Max. Operating Frequency: 33 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 54
• Ext Interrupts: 54
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 8
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.3/5.0
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

15.24 PIO Interrupt Mask Register
Register Name:
Access Type:
Offset:
Reset Value:
This register shows which pins have interrupts enabled. It is updated when interrupts are enabled or disabled by writing to
PIO_IER or PIO_IDR.
0 = Interrupt is not enabled on the corresponding input pin.
1 = Interrupt is enabled on the corresponding input pin.
15.25 PIO Interrupt Status Register
Register Name:
Access Type:
Offset:
This register indicates for each pin when a logic value change has been detected (rising or falling edge). This is valid
whether the PIO is selected for the pin or not and whether the pin is an input or an output.
The register is reset to zero following a read, and at reset.
0 = No input change has been detected on the corresponding pin since the register was last read.
1 = At least one input change has been detected on the corresponding pin since the register was last read.
112
P31
P23
P15
P31
P23
P15
31
23
15
P7
31
23
15
P7
7
7
AT91M42800A
P30
P22
P14
P30
P22
P14
P6
P6
PIO_IMR
Read-only
0x48
0
30
22
14
PIO_ISR
Read-only
0x4C
30
22
14
6
6
P29
P21
P13
P29
P21
P13
29
21
13
P5
29
21
13
P5
5
5
P28
P20
P12
P28
P20
P12
P4
P4
28
20
12
28
20
12
4
4
P27
P19
P11
P27
P19
P11
P3
P3
27
19
11
27
19
11
3
3
P26
P18
P10
P26
P18
P10
P2
P2
26
18
10
26
18
10
2
2
P25
P17
P25
P17
P9
P1
P9
P1
25
17
25
17
9
1
9
1
1779D–ATARM–14-Apr-06
P24
P16
P24
P16
P8
P0
P8
P0
24
16
24
16
8
0
8
0