am79c961 Advanced Micro Devices, am79c961 Datasheet - Page 169

• Manufacturer Part Number: am79c961
• Description: Pcnettm-isa Jumperless Single-chip Ethernet Controller For Isa
• Manufacturer: Advanced Micro Devices

mechanism that examines the amount of time spent in
tasks S5 and S7 as such: While the driver is polling for
each descriptor, it could count the number of poll opera-
tions performed and then adjust the number 1 buffer
size to a larger value, by adding “t” bytes to the buffer
count, if the number of poll operations was greater than
“x”. If fewer than “x” poll operations were needed for
each of S5 and S7, then the software should adjust the
buffer size to a smaller value by, subtracting “y” bytes
from the buffer count. Experiments with such a tuning
mechanism must be performed to determine the best
values for “X” and “y.”
Note whenever the size of buffer number 1 is adjusted,
buffer sizes for buffer number 2 and buffer 3 should also
be adjusted.
In some systems the typical mix of receive frames on a
network for a client application consists mostly of large
data frames, with very few small frames. In this case, for
maximum efficiency of buffer sizing, when a frame ar-
rives under a certain size limit, the driver should not
adjust the buffer sizes in response to the short frame .
An Alternative LAPP Flow – the TWO Interrupt
Method
An alternative to the above suggested flow is to use two
interrupts, one at the start of the Receive frame and the
other at the end of the receive frame, instead of just
looking for the SRP interupt as was described above.
This alternative attempts to reduce the amount of time
that the software “wastes” while polling for descriptor
own bits. This time would then be available for other
CPU tasks. It also minimizes the amount of time the
CPU needs for data copying. This savings can be ap-
plied to other CPU tasks.
Am79C961
The time from the end of frame arrival on the wire to
delivery of the frame to the application is labeled as
frame latency. For the one-interrupt method, frame la-
tency is minimized, while CPU utilization increases. For
the two-interrupt method, frame latency becomes
greater, while CPU utilization decreases.
Note that some of the CPU time that can be applied to
non-Ethernet tasks is used for task switching in the
CPU. One task switch is required to swap a non-
Ethernet task into the CPU (after S7A) and a second
task switch is needed to swap the Ethernet driver back in
again (at S8A). If the time needed to perform these task
switches exceeds the time saved by not polling descrip-
tors, then there is a net loss in performance with this
method. Therefore, the NEW WORD method imple-
mented should be carefully chosen.
Figure 3 shows the event flow for the two-interrupt
method.
Figure 4 shows the buffer sizing for the two-interrupt
method. Note that the second buffer size will be about
the same for each method.
There is another alternative which is a marriage of the
two previous methods. This third possibility would use
the buffer sizes set by the two-interrupt method, but
would use the polling method of determining frame end.
This will give good frame latency but at the price of very
high CPU utilization.
And still, there are even more compromise positions that
use various fixed buffer sizes and effectively, the flow of
the one-interrupt method. All of these compromises will
reduce the complexity of the one-interrupt method by
removing the heuristic buffer sizing code, but they all
become less efficient than heuristic code would allow.
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