am79c961 Advanced Micro Devices, am79c961 Datasheet - Page 39

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am79c961

Manufacturer Part Number
am79c961
Description
Pcnettm-isa Jumperless Single-chip Ethernet Controller For Isa
Manufacturer
Advanced Micro Devices
Datasheet

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Activate
I/O Range Check
Memory base address
bits[23:16] descriptor 0
Memory base address
bits[15:08] descriptor 0
Memory control
Memory upper limit
address;
bits[23:16] or range
length;
bits[23:16] for
descriptor 0
Memory upper limit
bits[15:08] or range
length;
bits[15:08] for
descriptor 0
Memory descriptor 1
I/O port base address
bits[15:08] descriptor 0
I/O port base address
bits[07:00] descriptor 0
Name
Name
Name
0x48-0x4C
Port Value
Address
Register
Register
Index
Index
0x40
0x41
0x42
0x43
0x44
0x60
0x61
0x30
0x31
Plug and Play Logical Device Control Registers
For each logical device there is one activate register that controls whether or not
the logical device is active on the ISA bus. Bit[0], if set, activates the logical device.
Bits[7:1] are reserved and must be zero. This is a read/write register. Before a
logical device is activated, I/O range check must be disabled.
This register is used to perform a conflict check on the I/O port range programmed
for use by a logical device.
Bit[7:2] Reserved
Bit 1[1] Enable I/O Range check, if set then I/O Range Check is enabled. I/O range
check is only valid when the logical device is inactive.
Bit[0], if set, forces the logical device to respond to I/O reads of the logical device’s
assigned I/O range with a 0x55 when I/O range check is in operation. If clear, the
logical device drives 0xAA. This register is read/write.
Read/write value indicating the selected memory base address bits[23:16] for
memory descriptor 0. This is the Boot Prom Space.
Read/write value indicating the selected memory base address bits[15:08] for
memory descriptor 0.
Bits[2:1] specifies 8/16-bit control. The encoding is identical to memory control
(bits[4:3]) of the information field in the memory descriptor.
Bit[0], =0, indicates the next field is used as a range length for decode
(implies range length and base alignment of memory descriptor are equal).
Bit[0] is read-only.
Read/write value indicating the selected memory high address bits[23:16] for
memory descriptor 0.
If bit[0] of memory control is 0, this is the range length.
If bit[0] of memory control is 1, this is considered invalid.
Read/write value indicating the selected memory high address bits[15:08] for
memory descriptor 0, either a memory address or a range length as described above.
Memory descriptor 1. This is the SRAM Space for Shared Memory.
Read/write value indicating the selected I/O lower limit address bits[15:08] for I/O
descriptor 0. If a logical device indicates it only uses 10 bit encoding, then bits[15:10]
do not need to be supported.
Read/write value indicating the selected I/O lower limit address bits[07:00] for I/O
descriptor 0.
Memory Space Configuration
I/O Space Configuration
P R E L I M I N A R Y
Am79C961
Definition
Definition
Definition
AMD
1-513

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