am79c961 Advanced Micro Devices, am79c961 Datasheet - Page 92

• Manufacturer Part Number: am79c961
• Description: Pcnettm-isa Jumperless Single-chip Ethernet Controller For Isa
• Manufacturer: Advanced Micro Devices

1-566
8
7
6
5 10BASE5_SEL
4
AMD
EISA_LVL
ISAINACT
DSDBUS
APWEN
access method to Plug and Play
registers will occur. Default is
zero.
Address PROM Write Enable. It
is reset to zero by RESET. When
asserted, this pin allows write ac-
cess to the internal Address
PROM RAM. APWEN is used
also to protect the Flash device
from write cycles.
gramming of the Flash device is
required, the APWEN bit needs
to be set. When reset, this pin
protects the internal Address
PROM RAM, and external Flash
device from being overwritten.
EISA Level. This bit is a read-
only register. It indicates if the
level or edge sensitive interrupts
have been selected. A set condi-
tion indicates level sensitive
interrupts. A clear condition indi-
cates ISA edge.
Disable Staggered Data Bus.
When this bit is a zero, the data
bus driver timing is staggered
from the address bus driver tim-
ing in Bus Master mode. When
this bit is a one, the data bus is
not staggered. It is similar to the
PCnet-ISA (Am79C960) timing.
This bit is reset to zero. For most
applications, this bit should not
have to be set.
10BASE5 Select. When this bit is
a one, the DC to DC converter
will
DXCVR pin. When 10BASE5_
SEL is a zero, the DC to DC con-
verter will be selected via the
DXCVR bit when the AUI port is
selected to support a DC-DC
converter for 10BASE2 MUAs.
When 10BASE-T port is selected
by whatever means, DXCR pin
will high independent of the bit
selected by the driver software
mode register, MEDSEL bits,
and Auto Selection
10BASE5_SEL is reset to zero.
ISAINACT allows for reduced in-
active timing appropriate for
modern
ISAINACT
RESET
ISAINACT is a zero, tMMR3 and
tMMW3 parameters are nomi-
nally 200 ns, which is com-
patible with EISA system. When
ISAINACT is set by writing a one,
tMMR3 and tMMW3 are nomi-
nally set to 100 ns.
be
is
deselected
is
ISA
asserted.
cleared
When pro-
machines.
P R E L I M I N A R Y
process.
via
When
when
Am79C961
the
3
2
1,0
ISACSR3: EEPROM Configuration
Bit
15
14
MEDSEL (1:0)
EE_VALID
EE_LOAD
EADISEL
MEDSEL
0 0
0 1
1 0
1 1
AWAKE
Name
LED
1
2
3
Software Select (Mode Reg, CSR15)
10BASE-T Port
Auto Selection (Default)
AUI Port
EADI Select. Enables EADI
match mode.
When EADI mode is selected,
the pins named LED1, LED2, and
LED3 change in function while
LED0
10BASE-T Link Status.
Auto-Wake. If AWAKE = “1”, the
10BASE-T receive circuitry is ac-
tive during sleep and listens for
Link Pulses. LED0 indicates Link
Status and goes active if the
10BASE-T port comes of out of
“link fail” state. This LED0 pin can
be used by external circuitry to
re-enable the PCnet-ISA
troller and/or other devices.
When AWAKE = “0”, the Auto-
Wake circuity is disabled. This bit
only has meaning when the
10BASE-T network interface is
selected.
Media Select. It was previously
defined as ASEL (Auto Select)
and XMAUSEL (External MAU
Select) in the PCnet-ISA. They
are now combined together and
defined to be software compat-
ible with ASEL and XMAUSEL in
the PCnet-ISA (Am79C960).
EEPROM Valid. This bit is a
read-only register. When a one is
read, EE_PROM has a valid
checksum. The sum of the total
bytes reads should equals FF
hex. When a zero is read, check-
sum failed, or SHFTBUSY pin
was sampled with a zero which
indicates no EEPROM present.
EEPROM Load. When written
with a one, the device will load
the
EE_PROM
continues
Function
Description
EADI Function
SRDCLK
SF/BD
SRD
to
into
indicate
+
con-
the