am79c961 Advanced Micro Devices, am79c961 Datasheet - Page 97

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am79c961

Manufacturer Part Number
am79c961
Description
Pcnettm-isa Jumperless Single-chip Ethernet Controller For Isa
Manufacturer
Advanced Micro Devices
Datasheet

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Receive Descriptors
The Receive Descriptor Ring Entries (RDREs) are com-
posed of four receive message fields (RMD0-3).
Together they contain the following information:
RMD0
Holds LADRF [15:0]. This is combined with HADR [7:0]
in RMD1 to form the 24-bit address of the buffer pointed
to by this descriptor table entry. There are no restrictions
on buffer byte alignment or length.
RMD1
Bit
15
14
The address of the actual message data buffer in
user (host) memory
The length of that message buffer
Status information indicating the condition of the
buffer. The eight most significant bits of RMD1
(RMD1[15:0]) are collectively termed the STATUS
of the receive descriptor.
Name
OWN
ERR
MATCH = 1:
MATCH = 0:
47
Destination Address
Received Message
This bit indicates that the de-
scriptor entry is owned by the
host
PCnet-ISA
The PCnet-ISA
the OWN bit after filling the buffer
pointed to by the descriptor entry.
The host sets the OWN bit after
emptying the buffer. Once the
PCnet-ISA
relinquished ownership of a
buffer, it must not change any
field in the descriptor entry.
ERR is the OR of FRAM, OFLO,
CRC, or BUFF. ERR is written by
the PCnet-ISA
Packet Accepted
Packet Rejected
(OWN=0)
Description
+
+
1 0
controller or host has
controller (OWN=1).
1
+
+
controller.
controller clears
or
P R E L I M I N A R Y
Address Match Logic
by
GEN
CRC
SEL
Am79C961
the
13
12
11
10
31
FRAM
OFLO
BUFF
CRC
32-Bit Resultant CRC
64
6
26
63
FRAMING
that the incoming frame con-
tained a non-integer multiple of
eight bits and there was an FCS
error. If there was no FCS error
on the incoming frame, then
FRAM will not be set even if there
was a non integer multiple of
eight bits in the frame. FRAM is
not valid in internal loopback
mode. FRAM is valid only when
ENP is set and OFLO is not.
FRAM
PCnet-ISA
OVERFLOW error indicates that
the receiver has lost all or part of
the incoming frame, due to an in-
ability to store the frame in a
memory buffer before the inter-
nal FIFO overflowed. OFLO is
valid only when ENP is not set.
OFLO
PCnet-ISA
CRC indicates that the receiver
has detected a CRC (FCS) error
on the incoming frame. CRC is
valid only when ENP is set and
OFLO is not. CRC is written by
the PCnet-ISA
BUFFER ERROR is set any time
the PCnet-ISA
not own the next buffer while data
chaining a received frame. This
can occur in either of two ways:
1) The OWN bit of the next
2) FIFO overflow occurred
buffer is zero
before the PCnet-ISA
controller polled the next
descriptor
MUX
(LADRF)
is
Address
is
Logical
Filter
+
+
controller.
controller.
0
ERROR
written
written
+
+
controller.
controller does
MATCH
18183B-22
0
AMD
indicates
by
by
+
1-571
the
the

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