am79c961 Advanced Micro Devices, am79c961 Datasheet - Page 73

• Manufacturer Part Number: am79c961
• Description: Pcnettm-isa Jumperless Single-chip Ethernet Controller For Isa
• Manufacturer: Advanced Micro Devices

network operation, and those which occur due to abnor-
mal network and/or host related events.
Normal events which may occur and which are handled
autonomously by the PCnet-ISA
cally collisions within the slot time and automatic runt
packet rejection. The PCnet-ISA
that collisions which occur within 512 bit times from the
start of reception (excluding preamble) will be automati-
cally deleted from the receive FIFO with no host
intervention. The receive FIFO will delete any frame
which is composed of fewer than 64 bytes provided that
the Runt Packet Accept (RPA bit in CSR124) feature
has not been enabled. This criteria will be met regard-
less of whether the receive frame was the first (or only)
frame in the FIFO or if the receive frame was queued be-
hind a previously received message.
Abnormal network conditions include:
These should not occur on a correctly configured 802.3
network and will be reported if they do.
Host related receive exception conditions include MISS,
BUFF, and OFLO. These are described in the Receive
Descriptor section.
Loopback Operation
Loopback is a mode of operation intended for system di-
agnostics. In this mode, the transmitter and receiver are
both operating at the same time so that the controller re-
ceives its own transmissions. The controller provides
two types of internal loopback and one type of external
loopback. In internal loopback mode, the transmitted
data can be looped back to the receiver at one of two
places inside the controller without actually transmitting
any data to the external network. The receiver will move
the received data to the next receive buffer, where it can
be examined by software. Alternatively, in external loop-
back mode, data can be transmitted to and received
from the external network.
There are restrictions on loopback operation. The
PCnet-ISA
cuit. The FCS generator can be used by the transmitter
to generate the FCS to append to the frame, or it can be
used by the receiver to verify the FCS of the received
frame. It can not be used by the receiver and transmitter
simultaneously.
If the FCS generator is connected to the receiver, the
transmitter will not append an FCS to the frame, but the
receiver will check for one. The user can, however, cal-
culate the FCS value for a frame and include this
four-byte number in the transmit buffer.
If the FCS generator is connected to the transmitter, the
transmitter will append an FCS to the frame, but the
FCS errors
Late collision
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controller has only one FCS generator cir-
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controller will ensure
controller are basi-
P R E L I M I N A R Y
Am79C961
receiver will not check for the FCS. However, the user
can verify the FCS by software.
During loopback, the FCS logic can be allocated to the
receiver by setting DXMTFCS = 1 in CSR15.
If DXMTFCS=0, the MAC Engine will calculate and ap-
pend the FCS to the transmitted message. The receive
message passed to the host will therefore contain an ad-
ditional 4 bytes of FCS. In this loopback configuration,
the receive circuitry cannot detect FCS errors if
they occur.
If DXMTFCS=1, the last four bytes of the transmit mes-
sage must contain the (software generated) FCS
computed for the transmit data preceding it. The MAC
Engine will transmit the data without addition of an FCS
field, and the FCS will be calculated and verified at
the receiver.
The loopback facilities of the MAC Engine allow full op-
eration to be verified without disturbance to the network.
Loopback operation is also affected by the state of the
Loopback Control bits (LOOP, MENDECL, and INTL) in
CSR15. This affects whether the internal MENDEC is
considered part of the internal or external loop-
back path.
The multicast address detection logic uses the FCS
generator circuit. Therefore, in the loopback mode(s),
the multicast address detection feature of the MAC En-
gine, programmed by the contents of the Logical
Address Filter (LADRF [63:0] in CSRs 8–11) can only be
tested when DXMTFCS=1, allocating the FCS genera-
tor to the receiver. All other features operate identically
in loopback as in normal operation, such as automatic
transmit padding and receive pad stripping.
When performing an internal loopback, no frame will be
transmitted to the network. However, when the PCnet-
ISA
receiver will not be able to detect network traffic. Exter-
nal loopback tests will transmit frames onto the network
if the AUI port is selected, and the PCnet-PCI controller
will receive network traffic while configured for external
loopback when the AUI port is selected. Runt Packet
Accept is automatically enabled when any loopback
mode is invoked.
Loopback mode can be performed with any frame size.
Runt Packet Accept is internally enabled (RPA bit in
CSR124 is not affected) when any loopback mode is in-
voked. This is to be backwards compatible to the
LANCE (Am7990) software.
When the 10BASE-T MAU is selected in external loop-
back mode, the collision detection is disabled. This is
necessary, because a collision in a 10BASE-T system is
defined as activity on the transmitter outputs and re-
ceiver inputs at the same time, which is exactly what
occurs during external loopback.
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controller is configured for internal loopback the
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