tsc693e ETC-unknow, tsc693e Datasheet - Page 31
tsc693e
Manufacturer Part Number
tsc693e
Description
Memory Controller
Manufacturer
ETC-unknow
Datasheet
1.TSC693E.pdf
(132 pages)
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A correctable error is detected if
Syndrome(7:0) = "00111000" | "01000101" | "01010100" | "00010110" | "00011111"
The non correctable error is detected if
Syndrome(7:0) are not equal to "00111000" | "01000101" | "01010100" | "00010110"
3.9.4. Fault Injection
Moved to paragraph 3.19.
3.9.5. Memory and I/O Parity
The MEC handles parity towards memory and I/O in a special way. The MEC can be
programmed to use no parity, only parity or parity and EDAC protection towards
memory. Towards I/O, the MEC can be programmed to use no parity or only parity.
The signal used for the parity bit is DPARIO. This pin is used by the MEC to check and
generate the odd parity over the 32-bit data bus according to Table 4 below.
MATRA MHS
Rev. D (10 Apr. 97)
| "00100101" | "00100110" | "01001010" | "00101111" | "00111011"
| "00111101" | "01100001" | "00011010" | "00101010" | "00101100"
| "01001111" | "01000110" | "01010010" | "01100100" | "01011101"
| "00100011" | "00110001" | "01001100" | "01101000" | "00010011"
| "00110010" | "00110100" | "01011000" | "01000011" | "01010001"
| "01011011" | "01101101" | "00000000" | "10000001" | "10000010"
| "10000100" | "10001000" | "10010000" | "10100000" | "11000000".
| "00100101" | "00100110" | "01001010" | "00101111" | "00111011"
| "00111101" | "01100001" | "00011010" | "00101010" | "00101100"
| "01001111" | "01000110" | "01010010" | "01100100" | "01011101"
| "00100011" | "00110001" | "01001100" | "01101000" | "00010011"
| "00110010" | "00110100" | "01011000" | "01000011" | "01010001"
| "01011011" | "01101101" | "00000000" | "10000001" | "10000010"
| "10000100" | "10001000" | "10010000" | "10100000" | "11000000"
| "10000000" | "00011111".
TSC693E
31
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