tsc693e ETC-unknow, tsc693e Datasheet - Page 76

• Manufacturer Part Number: tsc693e
• Description: Memory Controller
• Manufacturer: ETC-unknow

TSC693E
IUERR* - IU Error (input)
This input is connected to the ERROR* output of the (master) IU and is asserted when
the (master) IU enters error mode.
IUHWERR* - IU Hardware Error (input)
This input is connected to the HWERR* output of the (master) IU and is asserted when
the IU detects an internal hardware error.
IUCMPERR* - IU Comparison Error (input)
This input is connected to the CMPERR* signal of the slave IU in a master/slave
configuration and is asserted when there is a comparison error.
FPUHWERR* - FPU Hardware Error (input)
This input is connected to the HWERROR* output of the (master) FPU and is asserted
whenever there is an error in the (master) FPU.
FPUCMPERR* - FPU Comparison Error (input)
This input is connected to the CMPERR* signal of the slave FPU in a master/slave
configuration and is asserted when there is a comparison error.
MECHWERR* - MEC Hardware Error (output)
MECHWERR is an output indicating that a hardware error has been detected in the
MEC.
SYSERR* - System Error (output)
This output is asserted whenever an unmasked error is set in the ERSR register. It stays
asserted until the ERSR is cleared. The error can originate from either the IU, the FPU,
or the MEC itself. SYSERR* is used to signal to the system outside the ERC32 based
computer.
MATRA MHS
Rev. D (10 Apr. 97)
76