h8s-2649 Renesas Electronics Corporation., h8s-2649 Datasheet - Page 104

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h8s-2649

Manufacturer Part Number
h8s-2649
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 4 Exception Handling
4.6
Trap instruction exception handling starts when a TRAPA instruction is executed. Trap instruction
exception handling can be executed at all times in the program execution state.
Trap instruction exception handling is conducted as follows:
1. The values in the program counter (PC), condition code register (CCR), and extended control
2. The interrupt mask bit is updated and the T bit is cleared to 0.
3. A vector address corresponding to the interrupt source is generated, the start address is loaded
The TRAPA instruction fetches a start address from a vector table entry corresponding to a vector
number from 0 to 3, as specified in the instruction code.
Table 4.4 shows the statuses of CCR and EXR after execution of trap instruction exception
handling.
Table 4.4
[Legend]
1:
0:
:
Rev. 2.00 Dec. 05, 2005 Page 66 of 724
REJ09B0200-0200
Interrupt Control Mode
0
2
register (EXR) are saved to the stack.
from the vector table to the PC, and program execution starts from that address.
Set to 1
Cleared to 0
Retains value prior to execution
Trap Instruction
Statuses of CCR and EXR after Trap Instruction Exception Handling
I
1
1
CCR
UI
I2 to I0
EXR
T
0

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