h8s-2649 Renesas Electronics Corporation., h8s-2649 Datasheet - Page 386
h8s-2649
Manufacturer Part Number
h8s-2649
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2649.pdf
(766 pages)
- Current page: 386 of 766
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Section 12 Watchdog Timer (WDT)
Reading TCNT, TCSR, and RSTCSR (WDT0)
These registers are read in the same way as other registers. The read addresses are H'FF74 for
TCSR, H'FF75 for TCNT, and H'FF77 for RSTCSR.
12.5.2
If a timer counter clock pulse is generated during the T2 state of a TCNT write cycle, the write
takes priority and the timer counter is not incremented. Figure 12.5 shows this operation.
12.5.3
If bits CKS0 to CKS2 in TCSR are written to while the WDT is operating, errors could occur in
the incrementation. Software must be used to stop the watchdog timer (by clearing the TME bit to
0) before changing the value of bits CKS0 to CKS2.
12.5.4
If the mode is switched from watchdog timer to interval timer while the WDT is operating, errors
could occur in the incrementation. Software must be used to stop the watchdog timer (by clearing
the TME bit to 0) before switching the mode.
Rev. 2.00 Dec. 05, 2005 Page 348 of 724
REJ09B0200-0200
Contention between Timer Counter (TCNT) Write and Increment
Changing Value of CKS2 to CKS0
Switching between Watchdog Timer Mode and Interval Timer Mode
φ
Address
Internal write signal
TCNT input clock
TCNT
Figure 12.5 Contention between TCNT Write and Increment
TCNT write cycle
T 1
N
T 2
Counter write data
M
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