h8s-2649 Renesas Electronics Corporation., h8s-2649 Datasheet - Page 751

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h8s-2649

Manufacturer Part Number
h8s-2649
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Item
14.4 Operation
14.4.2 Initialization after
Hardware Reset
Figure 14.8 Detailed
Description of One-Bit
Time
Table 14.3 Setting Range
for TSEG1 and TSEG2 in
BCR
14.8.2 Reset
Section 16 Motor Control
PWM Timer (PWM)
16.3.7 PWM Buffer
Registers A, C, E, G
16.5 Operation
16.5.1 PWM Operation
Activation:
Page Revision (See Manual for Details)
454
455
471
503
506
Amended
Amended
Note: The time quantum values for TSEG1 and TSEG2 are
Amended
Therefore, always initialize mailboxes after a power-on reset, a
transition to hardware standby mode, software standby mode,
module stop mode, or watch mode. After a power-on reset,
recovery from software standby mode, or cancellation of
module stop mode, the reset interrupt flag (IRR0) is
automatically set.
Amended
Amended
Activation: Setting the CST bit in PWCR to 1 starts counting by
PWCNT. When a compare match between PWCNT and
PWCYR occurs, data is transferred from the buffer register to
the duty register and the CMF bit in PWCR is set to 1. If the IE
bit in PWCR has been set to 1 at this time, an interrupt can be
requested or the DTC can be activated.
Bit
12
1 time quantum
SYNC_SEG
determined by TSEG value + 1.
* Settable unless BRP = B'000000.
Bit Name
OTS
Initial
Value
0
PRSEG
1-bit time (8–25 time quanta)
Time segment 1 (TSEG1)
4–16 time quanta
Rev. 2.00 Dec. 05, 2005 Page 713 of 724
R/W
R/W
Description
Output Terminal Select
Holds the data to be sent to bit
12 in PWDTR.
PHSEG1
Time segment 2
REJ09B0200-0200
2–8 time quanta
(TSEG2)
PHSEG2

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