h8s-2649 Renesas Electronics Corporation., h8s-2649 Datasheet - Page 193

• Manufacturer Part Number: h8s-2649
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

8.5.5
An interrupt request is issued to the CPU when the DTC has completed the specified number of
data transfers, or a data transfer for which the DISEL bit was set to 1. In the case of interrupt
activation, the interrupt set as the activation source is generated. These interrupts to the CPU are
subject to CPU mask level and interrupt controller priority level control.
In the case of software activation, a software-activated data transfer end interrupt (SWDTEND) is
generated.
When the DISEL bit is 1 and one data transfer has been completed, or the specified number of
transfers have been completed, after data transfer ends the SWDTE bit is held at 1 and an
SWDTEND interrupt is generated. The interrupt handling routine will then clear the SWDTE bit
to 0.
When the DTC is activated by software, an SWDTEND interrupt is not generated during a data
transfer wait or during data transfer even if the SWDTE bit is set to 1.
8.5.6
DTC activation
request
DTC
request
Address
φ
Figure 8.9 DTC Operation Timing (Example in Normal Mode or Repeat Mode)
Interrupts
Operation Timing
Vector read
information read
Transfer
Data transfer
Read Write
Rev. 2.00 Dec. 05, 2005 Page 155 of 724
Section 8 Data Transfer Controller (DTC)
information write
Transfer
REJ09B0200-0200