h8s-2649 Renesas Electronics Corporation., h8s-2649 Datasheet - Page 589

• Manufacturer Part Number: h8s-2649
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

19.8.2
When erasing flash memory, the erase/erase-verify flowchart shown in figure 19.10 should be
followed.
1. Prewriting (setting erase block data to all 0) is not necessary.
2. Erasing is performed in block units. Make only a single-bit specification in the erase block
3. The time during which the E bit is set to 1 is the flash memory erase time.
4. The watchdog timer (WDT) is set to prevent overprogramming due to program runaway, etc.
5. For a dummy write to a verify address, write 1-byte data H'FF to an address whose lower two
6. If the read data is not erased successfully, set erase mode again, and repeat the erase/erase-
19.8.3
All interrupts, including the NMI interrupt, are disabled while flash memory is being programmed
or erased, or while the boot program is executing, for the following three reasons:
1. Interrupt during programming/erasing may cause a violation of the programming or erasing
2. If interrupt exception handling starts before the vector address is written or during
3. If an interrupt occurs during boot program execution, normal boot mode sequence cannot be
register 1 and 2 (EBR1 and EBR2). To erase multiple blocks, each block must be erased in
turn.
Set a value greater than (t
bits are B'00. Verify data can be read in words from the address to which a dummy write was
performed.
verify sequence as before. The maximum number of repetitions of the erase/erase-verify
sequence is (N).
algorithm, with the result that normal operation cannot be assured.
programming/erasing, a correct vector cannot be fetched and the CPU malfunctions.
carried out.
Erase/Erase-Verify
Interrupt Handling when Programming/Erasing Flash Memory
sesu
+ t
se
+ t
ce
+ t
cesu
) ms as the WDT overflow period.
Rev. 2.00 Dec. 05, 2005 Page 551 of 724
REJ09B0200-0200
Section 19 ROM