h8s-2649 Renesas Electronics Corporation., h8s-2649 Datasheet - Page 169

• Manufacturer Part Number: h8s-2649
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

Write after Read: If an external write occurs after an external read while the ICIS0 bit is set to 1
in BCRH, an idle cycle is inserted at the start of the write cycle.
Figure 7.17 shows an example of the operation in this case. In this example, bus cycle A is a read
cycle for ROM with a long output floating time, and bus cycle B is a CPU write cycle. In (a), an
idle cycle is not inserted, and a collision occurs in bus cycle B between the data read from ROM
and the CPU write data. In (b), an idle cycle is inserted, and a data collision is prevented.
Address bus
CS* (area A)
CS* (area B)
Note: * The CS signal is generated outside the LSI.
Data bus
HWR
RD
Figure 7.17 Example of Idle Cycle Operation (Write after Read)
φ
(a) No idle cycle insertion
T
(ICIS0 = 0)
1
Bus cycle A
Long output floating time
T
2
T
3
Bus cycle B
T
1
T
2
Data collision
CS* (area A)
CS* (area B)
Address bus
Data bus
HWR
RD
φ
Rev. 2.00 Dec. 05, 2005 Page 131 of 724
T
(b) Idle cycle insertion
1
Bus cycle A
(ICIS0 = 1, initial value)
T
2
Section 7 Bus Controller (BSC)
T
3
Idle cycle
T
i
Bus cycle B
T
REJ09B0200-0200
1
T
2