h8s-2649 Renesas Electronics Corporation., h8s-2649 Datasheet - Page 758
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h8s-2649
Manufacturer Part Number
h8s-2649
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2649.pdf
(766 pages)
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E
Effective Address ............................... 43, 46
Effective Address Extension..................... 42
Exception Handling .................................. 59
Extended Control Register (EXR) ............ 25
F
Flash memory ......................................... 529
G
General Registers...................................... 24
H
HCAN..................................................... 421
Rev. 2.00 Dec. 05, 2005 Page 720 of 724
REJ09B0200-0200
vector number for the software
activation interrupt.............................. 144
Interrupts............................................... 65
Reset Exception Handling .................... 61
Stack Status .......................................... 67
Traces ................................................... 64
Trap Instruction .................................... 66
Boot mode .......................................... 542
Emulation ........................................... 546
Erase/erase-verify ............................... 551
Erasing units ....................................... 534
Error protection .................................. 553
Hardware protection ........................... 553
Program/program-verify..................... 549
Software protection............................. 553
User program mode ............................ 545
11 consecutive recessive bits .............. 451
Arbitration field .......................... 458, 462
buffer segment .................................... 454
Configuration mode............................ 451
I
Instruction Set ........................................... 31
Interrupt Control Modes ........................... 83
Interrupt Controller ................................... 69
Interrupt Exception Handling
Vector Table ............................................. 79
Interrupt Mask Bit..................................... 26
interrupt mask level .................................. 25
interrupt priority register (IPR) ................. 69
Interrupts
Control field........................................ 458
Data field ............................................ 458
Data frame .......................................... 463
DTC Interface ..................................... 469
HCAN Halt Mode............................... 467
HCAN Sleep Mode............................. 464
mailbox ............................................... 447
Message Control (MC0 to MC15) ...... 447
Message Data (MD0 to MD15) .......... 449
Message transmission cancellation ..... 459
Message Transmission Method........... 456
Remote frame...................................... 463
remote transmission request bit........... 463
Unread message overwrite.................. 463
Arithmetic Operations Instructions....... 34
Bit Manipulation Instructions ............... 37
Block Data Transfer Instructions .......... 41
Branch Instructions ............................... 39
Data Transfer Instructions..................... 33
Logic Operations Instructions............... 36
Shift Instructions................................... 36
System Control Instructions.................. 40
ADI ..................................................... 485
ERS0/OVR0........................................ 468
NMI....................................................... 78
RM0 .................................................... 468
RM1 .................................................... 468
SLE0 ................................................... 468
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