h8s-2649 Renesas Electronics Corporation., h8s-2649 Datasheet - Page 480

• Manufacturer Part Number: h8s-2649
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

Section 14 Controller Area Network (HCAN)
14.3.13 Interrupt Mask Register (IMR)
IMR is a 16-bit register containing flags that enable or disable requests by individual interrupt
sources. The reset interrupt flag cannot be masked.
Rev. 2.00 Dec. 05, 2005 Page 442 of 724
REJ09B0200-0200
Bit
15
14
13
12
11
10
9
8
7 to 5 
Bit Name
IMR7
IMR6
IMR5
IMR4
IMR3
IMR2
IMR1

Initial
Value
1
1
1
1
1
1
1
0
All 1
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R/W
R/W
Description
Overload Frame Interrupt Mask
When this bit is cleared to 0, an interrupt request by
IRR7 (OVR0) is enabled. When set to 1, it is masked.
Bus Off Interrupt Mask
When this bit is cleared to 0, an interrupt request by
IRR6 (ERS0) is enabled. When set to 1, it is masked.
Error Passive Interrupt Mask
When this bit is cleared to 0, an interrupt request by
IRR5 (ERS0) is enabled. When set to 1, it is masked.
Receive Overload Warning Interrupt Mask
When this bit is cleared to 0, an interrupt request by
IRR4 (OVR0) is enabled. When set to 1, it is masked.
Transmit Overload Warning Interrupt Mask
When this bit is cleared to 0, an interrupt request by
IRR3 (OVR0) is enabled. When set to 1, it is masked.
Remote Frame Request Interrupt Mask
When this bit is cleared to 0, an interrupt request by
IRR2 (OVR0) is enabled. When set to 1, it is masked.
Receive Message Interrupt Mask
When this bit is cleared to 0, an interrupt request by
IRR1 (RM1) is enabled. When set to 1, it is masked.
Reserved
This bit is always read as 0. The write value should
always be 0.
Reserved
These bits are always read as 1. The write value should
always be 1.