h8s-2649 Renesas Electronics Corporation., h8s-2649 Datasheet - Page 538

• Manufacturer Part Number: h8s-2649
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

Section 16 Motor Control PWM Timer (PWM)
16.3.6
There are four PWDTR registers (PWDTRA, PWDTRC, PWDTRE, and PWDTRG). The
PWDTRA is used for outputs PWMA and PWMB, PWDTRC for outputs PWMC and PWMD,
PWDTRE for outputs PWME and PWMF, and PWDTRG for outputs PWMG and PWMH.
PWDTR can not be directly accessed by the CPU. When a PWCYR compare match occurs, data is
transferred from the buffer register (PWBFR) to the duty register (PWDTR).
Rev. 2.00 Dec. 05, 2005 Page 500 of 724
REJ09B0200-0200
Bit
15 to 13
12
11, 10
9
8
7
6
5
4
3
2
1
0
Compare match
PWCNT
(lower 10 bits)
PWCYR
(lower 10 bits)
PWM Duty Registers A, C, E, G (PWDTRA, PWDTRC, PWDTRE, PWDTRG)
Bit Name

OTS

DT9
DT8
DT7
DT6
DT5
DT4
DT3
DT2
DT1
DT0
0
Initial
Value

0

0
0
0
0
0
0
0
0
0
0
Figure 16.2 Cycle Register Compare Match
1
R/W













Description
Reserved
Output Terminal Select
Selects the pin used for PWM output. Unselected pins
output a low level (or a high level when the
corresponding bit in PWPR is set to 1). For details, see
table 16.2.
Reserved
Duty
These bits specify the PWM output duty. A high level
(or a low level when the corresponding bit in PWPR is
set to 1) is output from the time PWCNT is cleared by a
PWCYR compare match until a PWDTR compare
match occurs. When all of the bits are 0, there is no
high-level (or low-level when the corresponding bit in
PWPR is set to 1) output period.
N
Compare match
N–2
N–1
0
1