h8s-2649 Renesas Electronics Corporation., h8s-2649 Datasheet - Page 516

• Manufacturer Part Number: h8s-2649
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

Section 15 A/D Converter
15.3
The A/D converter has the following registers. Module stop mode for the A/D converter is
specified with the MSTPA1 bit in the module stop control register (MSTPCRA). For details on the
module stop control register A (MSTPCRA), refer to section 21.1.3, Module Stop Control
Register A to D (MSTPCRA to MSTPCRD).
• A/D data register A (ADDRA)
• A/D data register B (ADDRB)
• A/D data register C (ADDRC)
• A/D data register D (ADDRD)
• A/D control/status register (ADCSR)
• A/D control register (ADCR)
15.3.1
There are four 16-bit read-only ADDR registers ADDRA to ADDRD, used to store the results of
A/D conversion. The ADDR registers to store conversion results for each channel are shown in
table 15.2.
The converted 10-bit data is stored in bits 6 to 15 in ADDR. The lower 6 bits are always read as 0.
The data bus between the CPU and the A/D converter is 8 bits wide. The upper byte can be read
directly from the CPU, however the lower byte should be read via a temporary register. The
temporary register contents are transferred from the ADDR when the upper byte data is read.
When reading the ADDR, always read the upper byte first, and then read the lower byte, or read in
word unit. Otherwise, the read contents are not guaranteed.
Table 15.2 Analog Input Channels and Corresponding ADDR Registers
Rev. 2.00 Dec. 05, 2005 Page 478 of 724
REJ09B0200-0200
Group 0
(CH2 = 0)
AN0
AN1
AN2
AN3
Register Description
A/D Data Registers A to D (ADDRA to ADDRD)
CH3 = 0
Group 1
(CH2 = 1)
AN4
AN5
AN6
AN7
Analog Input Channel
Group 2
(CH2 = 0)
AN8
AN9
AN10
AN11
CH3 = 1
Group 3
(CH2 = 1)
AN12
AN13
AN14
AN15
A/D Data Register to
Store the A/D
Conversion Results
ADDRA
ADDRB
ADDRC
ADDRD