h8s-2649 Renesas Electronics Corporation., h8s-2649 Datasheet - Page 165

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h8s-2649

Manufacturer Part Number
h8s-2649
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
7.6
In this LSI, external space area 0 can be designated as burst ROM space, and burst ROM
interfacing performed. The burst ROM space interface enables ROM with burst access capability
to be accessed at high speed.
Area 0 can be designated as burst ROM space by means of bit BSTRM in BCRH. Continuous
burst accesses of four or eight words can be performed, according to the setting of the BRSTS0 bit
in BCRH. One or two states can be selected for burst access.
In burst ROM interface space, burst access covers only CPU read accesses.
7.6.1
The number of access states in the initial cycle (full access) with the burst ROM interface is
determined by the AST0 setting in ASTCR. Wait states can be inserted when the AST0 bit is set to
1. One or two states can be selected for the burst cycle according to the BRSTS1 bit setting in
BCRH. Wait states cannot be inserted. When area 0 is designated as burst ROM space, area 0 is a
16-bit access space regardless of the ABW0 bit setting in ABWCR.
When the BRSTS0 bit in BCRH is cleared to 0, burst access of up to four words is performed.
When the BRSTS0 bit is set to 1, burst access of up to eight words is performed.
The basic access timing for burst ROM space is shown in figures 7.14 and 7.15.
Burst ROM Interface
Basic Timing
Rev. 2.00 Dec. 05, 2005 Page 127 of 724
Section 7 Bus Controller (BSC)
REJ09B0200-0200

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