h8s-2649 Renesas Electronics Corporation., h8s-2649 Datasheet - Page 69

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h8s-2649

Manufacturer Part Number
h8s-2649
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
2.6
The H8S/2600 CPU has 69 instructions. The instructions are classified by function in table 2.1.
Table 2.1
Notes: B-byte; W-word; L-longword.
Function
Data transfer
Arithmetic
operation
Logic operations
Shift
Bit manipulation
Branch
System control
Block data transfer EEPMOV
1. POP.W Rn and PUSH.W Rn are identical to MOV.W @SP+,Rn and MOV.W Rn,@-SP.
2. Bcc is the general name for conditional branch instructions.
3. Cannot be used in this LSI.
4. Only register ER0, ER1, ER4, or ER5 should be used when using the TAS instruction.
Instruction Set
POP.L ERn and PUSH.L ERn are identical to MOV.L @SP+,ERn and
MOV.L ERn,@-SP.
Instruction Classification
Instructions
MOV
POP*
LDM, STM
MOVFPE*
ADD, SUB, CMP, NEG
ADDX, SUBX, DAA, DAS
INC, DEC
ADDS, SUBS
MULXU, DIVXU, MULXS, DIVXS
EXTU, EXTS
TAS*
MAC, LDMAC, STMAC, CLRMAC
AND, OR, XOR, NOT
SHAL, SHAR, SHLL, SHLR, ROTL, ROTR, ROTXL, ROTXR B/W/L 8
BSET, BCLR, BNOT, BTST, BLD, BILD, BST, BIST, BAND,
BIAND, BOR, BIOR, BXOR, BIXOR
Bcc*
TRAPA, RTE, SLEEP, LDC, STC, ANDC, ORC, XORC, NOP 
2
4
, JMP, BSR, JSR, RTS
1
, PUSH*
3
, MOVTPE*
1
3
Rev. 2.00 Dec. 05, 2005 Page 31 of 724
REJ09B0200-0200
Size
L
B/W/L 5
W/L
B
B/W/L 23
B
B/W/L
L
B/W
W/L
B
B/W/L 4
B
Section 2 CPU
Total: 69
Types
14
5
9
1

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