h8s-2649 Renesas Electronics Corporation., h8s-2649 Datasheet - Page 626

• Manufacturer Part Number: h8s-2649
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

Section 21 Power-Down Modes
21.10
21.10.1 Overview of Direct Transitions
There are three modes, high-speed, medium-speed, and subactive, in which the CPU executes
programs. When a direct transition is made, there is no interruption of program execution in
shifting between high-speed and subactive modes. Direct transitions are enabled by setting the
DTON bit in LPWRCR to 1, then executing the SLEEP instruction. After a transition, direct
transition interrupt exception handling starts.
Direct Transition from High-Speed Mode to Subactive Mode: Execute the SLEEP instruction
in high-speed mode with the SSBY bit in SBYCR = 1, the LSON bit in LPWRCR = 1, the DTON
bit = 1, and the PSS bit in TCSR (WDT1) = 1, to make a direct transition to subactive mode.
Direct Transition from Subactive Mode to High-Speed Mode: Execute the SLEEP instruction
in subactive mode with the SSBY bit in SBYCR = 1, the LSON bit in LPWRCR = 0, the DTON
bit = 1, and the PSS bit in TCSR (WDT_1) = 1, to make a direct transition to high-speed mode
after the time set in the STS2 to STS0 bits in SBYCR has elapsed.
21.11
The output of the φ clock can be controlled by means of the PSTOP bit in SCKCR and DDR for
the corresponding port. When the PSTOP bit is set to 1, the φ clock stops at the end of the bus
cycle, and φ output goes high. φ clock output is enabled when the PSTOP bit is cleared to 0. When
DDR for the corresponding port is cleared to 0, φ clock output is disabled and input port mode is
set. Table 21.4 shows the state of the φ pin in each processing state.
Table 21.4 φ Pin State in Each Processing State
[Legend]
X:
Rev. 2.00 Dec. 05, 2005 Page 588 of 724
REJ09B0200-0200
Register Settings
DDR
0
1
1
Don't care
Direct Transitions
φ Clock Output Disabling Function
PSTOP
X
0
1
High-Speed Mode,
Medium-Speed
Mode, Subactive
Mode
High impedance
φ
Fixed high
output
Sleep Mode,
Subsleep Mode
High impedance
φ
Fixed high
output
Software Standby
Mode, Watch
Mode, Direct
Transitions
High impedance
Fixed high
Hardware Standby
Mode
High impedance