h8s-2649 Renesas Electronics Corporation., h8s-2649 Datasheet - Page 379

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h8s-2649

Manufacturer Part Number
h8s-2649
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
• TCSR_1
Bit
7
6
5
4
3
Bit Name
OVF
WT/IT
TME
PSS
RST/NMI
0
0
Initial
Value
0
0
0
R/W
R/(W)* Overflow Flag
R/W
R/W
R/W
R/W
Timer Mode Select
Timer Enable
Prescaler Select
Reset or NMI
Description
Indicates that TCNT has overflowed from H'FF to H'00.
Only a write of 0 is permitted, to clear the flag.
[Setting conditions]
[Clearing condition]
Selects whether the WDT is used as a watchdog timer
or interval timer.
0: Interval timer mode
1: Watchdog timer mode
When this bit is set to 1, TCNT starts counting. When
this bit is cleared, TCNT stops counting and is initialized
to H'00.
Selects the clock source to be input to TCNT.
0: Counts the divided clock of φ–based prescaler (PSM)
1: Counts the divided clock of φSUB–based prescaler
Selects whether an internal reset request or an NMI
interrupt request when the TCNT overflows during the
watchdog timer mode.
0: NMI interrupt request
1: Internal reset request
(PSS)
When TCNT overflows (changes from H'FF to H'00)
When internal reset request generation is selected
in watchdog timer mode, OVF is cleared
automatically by the internal reset.
Cleared by reading TCSR when OVF = 1, then
writing 0 to OVF
Rev. 2.00 Dec. 05, 2005 Page 341 of 724
Section 12 Watchdog Timer (WDT)
REJ09B0200-0200

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