h8s-2649 Renesas Electronics Corporation., h8s-2649 Datasheet - Page 402

• Manufacturer Part Number: h8s-2649
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

Section 13 Serial Communication Interface (SCI)
Rev. 2.00 Dec. 05, 2005 Page 364 of 724
REJ09B0200-0200
Bit
3
2
1
0
Bit Name
PER
TEND
MPB
MPBT
1
0
Initial
Value
0
0
R/W
R/W
R
R
R/W
Description
Parity Error
[Setting condition]
•
[Clearing condition]
•
Transmit End
This bit is set to 1 when no error signal has been sent
back from the receiving end and the next transmit data
is ready to be transferred to TDR.
[Setting conditions]
•
•
[Clearing conditions]
•
•
Multiprocessor Bit
This bit is not used in smart card interface mode.
Multiprocessor Bit Transfer
Write 0 to this bit in smart card interface mode.
When a parity error is detected during reception
When 0 is written to PER after reading PER = 1
When the TE bit in SCR is 0 and the ERS bit is also
0
When the ERS bit is 0 and the TDRE bit is 1 after
the specified interval following transmission of 1-
byte data.
The timing of bit setting differs according to the
register setting as follows:
When GM = 0 and BLK = 0, 2.5 etu after
transmission starts
When GM = 0 and BLK = 1, 1.5 etu after
transmission starts
When GM = 1 and BLK = 0, 1.0 etu after
transmission starts
When GM = 1 and BLK = 1, 1.0 etu after
transmission starts
When 0 is written to TDRE after reading TDRE = 1
When the DTC is activated by a TXI interrupt and
writes data to TDR