h8s-2649 Renesas Electronics Corporation., h8s-2649 Datasheet - Page 53

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h8s-2649

Manufacturer Part Number
h8s-2649
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
The H8S/2600 CPU is a high-speed central processing unit with an internal 32-bit architecture that
is upward-compatible with the H8/300 and H8/300H CPUs. The H8S/2600 CPU has sixteen 16-bit
general registers, can address a 16-Mbyte linear address space, and is ideal for realtime control.
This section describes the H8S/2600 CPU. The usable modes and address spaces differ depending
on the product. For details on each product, refer to section 3, MCU Operating Modes.
2.1
• Upward-compatible with H8/300 and H8/300H CPUs
• General-register architecture
• Sixty-nine basic instructions
• Eight addressing modes
• 16-Mbyte address space
• High-speed operation
CPUS260A_000020020300
 Can execute H8/300 and H8/300H CPUs object programs
 Sixteen 16-bit general registers also usable as sixteen 8-bit registers or eight 32-bit registers
 8/16/32-bit arithmetic and logic instructions
 Multiply and divide instructions
 Powerful bit-manipulation instructions
 Multiply-and-accumulate instruction
 Register direct [Rn]
 Register indirect [@ERn]
 Register indirect with displacement [@(d:16,ERn) or @(d:32,ERn)]
 Register indirect with post-increment or pre-decrement [@ERn+ or @–ERn]
 Absolute address [@aa:8, @aa:16, @aa:24, or @aa:32]
 Immediate [#xx:8, #xx:16, or #xx:32]
 Program-counter relative [@(d:8,PC) or @(d:16,PC)]
 Memory indirect [@@aa:8]
 Program: 16 Mbytes
 Data:
 All frequently-used instructions execute in one or two states
 8/16/32-bit register-register add/subtract: 1 state
 8 × 8-bit register-register multiply: 3 states
Features
16 Mbytes
Section 2 CPU
Rev. 2.00 Dec. 05, 2005 Page 15 of 724
REJ09B0200-0200
Section 2 CPU

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