h8s-2649 Renesas Electronics Corporation., h8s-2649 Datasheet - Page 314

• Manufacturer Part Number: h8s-2649
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

Section 10 16-Bit Timer Pulse Unit (TPU)
10.4.3
Buffer operation, provided for channels 0 and 3, enables TGRC and TGRD to be used as buffer
registers.
Buffer operation differs depending on whether TGR has been designated as an input capture
register or as a compare match register.
Table 10.28 shows the register combinations used in buffer operation.
Table 10.28 Register Combinations in Buffer Operation
• When TGR is an output compare register
• When TGR is an input capture register
Rev. 2.00 Dec. 05, 2005 Page 276 of 724
REJ09B0200-0200
Channel
0
3
When a compare match occurs, the value in the buffer register for the corresponding channel is
transferred to the timer general register.
This operation is illustrated in figure 10.12.
When input capture occurs, the value in TCNT is transferred to TGR and the value previously
held in the timer general register is transferred to the buffer register.
This operation is illustrated in figure 10.13.
Buffer Operation
Buffer register
Figure 10.12 Compare Match Buffer Operation
Timer General Register
TGRA_0
TGRB_0
TGRA_3
TGRB_3
Compare match signal
Timer general
register
Comparator
Buffer Register
TGRC_0
TGRD_0
TGRC_3
TGRD_3
TCNT