h8s-2649 Renesas Electronics Corporation., h8s-2649 Datasheet - Page 393
h8s-2649
Manufacturer Part Number
h8s-2649
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2649.pdf
(766 pages)
- Current page: 393 of 766
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13.3.3
TDR is an 8-bit register that stores data for transmission. When the SCI detects that TSR is empty,
it transfers the transmit data written in TDR to TSR and starts transmission. The double-buffered
structure of TDR and TSR enables continuous serial transmission. If the next transmit data has
already been written to TDR during serial transmission, the SCI transfers the written data to TSR
to continue transmission. Although TDR can be read or written to by the CPU at all times, to
achieve reliable serial transmission, write transmit data to TDR only once after confirming that the
TDRE bit in SSR is set to 1.
13.3.4
TSR is a shift register that transmits serial data. To perform serial data transmission, the SCI first
transfers transmit data from TDR to TSR, then sends the data to the TxD pin. TSR cannot be
directly accessed by the CPU.
13.3.5
SMR is used to set the SCI's serial transfer format and select the baud rate generator clock source.
Some bit functions of SMR differ between normal serial communication interface mode and smart
card interface mode.
• Normal Serial Communication Interface Mode (When SMIF in SCMR is 0)
Bit
7
6
Bit Name
C/A
CHR
Transmit Data Register (TDR)
Transmit Shift Register (TSR)
Serial Mode Register (SMR)
Initial
Value
0
0
R/W
R/W
R/W
Communication Mode
Description
0: Asynchronous mode
1: Clocked synchronous mode
Character Length (enabled only in asynchronous mode)
0: Selects 8 bits as the data length.
1: Selects 7 bits as the data length. LSB-first is fixed
In clocked synchronous mode, a fixed data length of 8
bits is used.
and the MSB of TDR is not transmitted in
transmission.
Section 13 Serial Communication Interface (SCI)
Rev. 2.00 Dec. 05, 2005 Page 355 of 724
REJ09B0200-0200
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