HD6412373R RENESAS [Renesas Technology Corp], HD6412373R Datasheet - Page 363
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HD6412373R
Manufacturer Part Number
HD6412373R
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6412373R.pdf
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• DMABCRL
Bit
7
6
5
4
Bit Name
DTE1B
DTE1A
DTE0B
DTE0A
Initial Value
0
0
0
0
R/W
R/W
R/W
R/W
R/W
Description
Data Transfer Enable 1B
Data Transfer Enable 1A
Data Transfer Enable 0B
Data Transfer Enable 0A
If the DTE bit is cleared to 0 when DTIE = 1, the
DMAC regards this as indicating the end of a
transfer, and issues a transfer end interrupt request
to the CPU or DTC.
When DTE = 0, data transfer is disabled and the
DMAC ignores the activation source selected by
the DTF3 to DTF0 bits in DMACR.
When DTE = 1, data transfer is enabled and the
DMAC waits for a request by the activation source
selected by the DTF3 to DTF0 bits in DMACR.
When a request is issued by the activation source,
DMA transfer is executed.
[Clearing conditions]
•
•
•
[Setting condition]
When 1 is written to the DTE bit after reading DTE
= 0
When initialization is performed
When the specified number of transfers have
been completed in a transfer mode other than
repeat mode
When 0 is written to the DTE bit to forcibly
suspend the transfer, or for a similar reason
Rev.7.00 Mar. 18, 2009 page 295 of 1136
Section 7 DMA Controller (DMAC)
REJ09B0109-0700
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