HD6412373R RENESAS [Renesas Technology Corp], HD6412373R Datasheet - Page 828

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HD6412373R

Manufacturer Part Number
HD6412373R
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 15 Serial Communication Interface (SCI, IrDA)
In the specification, the high pulse width is fixed at a minimum of 1.41 µs, and a maximum of
(3/16 + 2.5%) × bit rate or (3/16 × bit rate) + 1.08 µs. When system clock φ is 20 MHz, 1.6 µs can
be set for a high pulse width with a minimum value of 1.41 µs.
When the serial data is 1, no pulse is output.
Reception: In reception, IR frame data is converted to a UART frame by the IrDA interface, and
input to the SCI.
When a high pulse is detected, 0 data is output, and if there is no pulse during a one-bit interval, 1
data is output. Note that a pulse shorter than the minimum pulse width of 1.41 µs will be identified
as a 0 signal.
High Pulse Width Selection: Table 15.12 shows possible settings for bits IrCKS2 to IrCKS0
(minimum pulse width), and operating frequencies of this LSI and bit rates, for making the pulse
width shorter than 3/16 times the bit rate in transmission.
Rev.7.00 Mar. 18, 2009 page 760 of 1136
REJ09B0109-0700
Start
Start
cycle
bit
bit
Bit
0
Transmit
0
Figure 15.34 IrDA Transmit/Receive Operations
1
1
0
0
UART frame
IR frame
1
1
0
0
Data
Data
0
0
Receive
1
1
Pulse width
1.6 μs to 3/16 bit cycle
1
1
0
0
Stop
Stop
bit
bit
1
1

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