HD6412373R RENESAS [Renesas Technology Corp], HD6412373R Datasheet - Page 620

• Manufacturer Part Number: HD6412373R
• Description: Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 11 16-Bit Timer Pulse Unit (TPU)
11.3.1
The TCR registers control the TCNT operation for each channel. The TPU has a total of six TCR
registers, one for each channel. TCR register settings should be made only when TCNT operation
is stopped.
Bit
7
6
5
4
3
2
1
0
Rev.7.00 Mar. 18, 2009 page 552 of 1136
REJ09B0109-0700
Bit Name
CCLR2
CCLR1
CCLR0
CKEG1
CKEG0
TPSC2
TPSC1
TPSC0
Timer Control Register (TCR)
Initial Value
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Counter Clear 2 to 0
These bits select the TCNT counter clearing
source. See tables 11.3 and 11.4 for details.
Clock Edge 1 and 0
These bits select the input clock edge. When the
input clock is counted using both edges, the input
clock period is halved (e.g. φ/4 both edges = φ/2
rising edge). If phase counting mode is used on
channels 1, 2, 4, and 5, this setting is ignored and
the phase counting mode setting has priority.
Internal clock edge selection is valid when the input
clock is φ/4 or slower. This setting is ignored if the
input clock is φ/1, or when overflow/underflow of
another channel is selected.
00: Count at rising edge
01: Count at falling edge
1×: Count at both edges
Legend: ×: Don’t care
Time Prescaler 2 to 0
These bits select the TCNT counter clock. The
clock source can be selected independently for
each channel. See tables 11.5 to 11.10 for details.