HD6412373R RENESAS [Renesas Technology Corp], HD6412373R Datasheet - Page 629

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HD6412373R

Manufacturer Part Number
HD6412373R
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Table 11.13 TIORL_0
Bit 7
IOD3
0
1
Legend: ×: Don’t care
Notes: 1. When bits TPSC2 to TPSC0 in TCR_1 are set to B'000 and φ/1 is used as the TCNT_1
2. When the BFB bit in TMDR_0 is set to 1 and TGRD_0 is used as a buffer register, this
Bit 6
IOD2
0
1
0
1
count clock, this setting is invalid and input capture is not generated.
setting is invalid and input capture/output compare is not generated.
Bit 5
IOD1
0
1
0
1
0
1
×
Bit 4
IOD0
0
1
0
1
0
1
0
1
0
1
×
×
TGRD_0
Function
Output
compare
register *
Input
capture
register *
2
2
TIOCD0 Pin Function
Output disabled
Initial output is 0 output
0 output at compare match
Initial output is 0 output
1 output at compare match
Initial output is 0 output
Toggle output at compare match
Output disabled
Initial output is 1 output
0 output at compare match
Initial output is 1 output
1 output at compare match
Initial output is 1 output
Toggle output at compare match
Capture input source is TIOCD0 pin
Input capture at rising edge
Capture input source is TIOCD0 pin
Input capture at falling edge
Capture input source is TIOCD0 pin
Input capture at both edges
Capture input source is channel 1/count clock
Input capture at TCNT_1 count-up/count-down *
Rev.7.00 Mar. 18, 2009 page 561 of 1136
Section 11 16-Bit Timer Pulse Unit (TPU)
Description
REJ09B0109-0700
1

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