HD6412373R RENESAS [Renesas Technology Corp], HD6412373R Datasheet - Page 432

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HD6412373R

Manufacturer Part Number
HD6412373R
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 8 EXDMA Controller (EXDMAC)
Block Transfer Mode:
Bit
31
to
24
23
to
16
15
to
0
Rev.7.00 Mar. 18, 2009 page 364 of 1136
REJ09B0109-0700
Bit Name
Initial Value
All 0
Undefined
Undefined
R/W
R/W
R/W
16-Bit Transfer Counter
Description
Reserved
These bits are always read as 0 and cannot be
modified.
Block Size
These bits specify the block size (number of bytes
or number of words) for block transfer. Setting H'01
specifies one as the block, while setting H'00
specifies the maximum block size, that is 256. The
register value always indicates the specified block
size.
These bits specify the number of block transfers.
Setting H'0001 specifies one block transfer. Setting
H'0000 means no specification for the number of
transfers, and the transfer counter function is
halted. In this case, there is no transfer end
interrupt by the transfer counter. Setting H'FFFF
specifies the maximum number of block transfers,
that is 65,535. During EXDMA transfer, this counter
shows the remaining number of block transfers.

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