HD6412373R RENESAS [Renesas Technology Corp], HD6412373R Datasheet - Page 947

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HD6412373R

Manufacturer Part Number
HD6412373R
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 21 Flash Memory (0.18-μm F-ZTAT Version)
21.3.2
Programming/Erasing Interface Parameter
The programming/erasing interface parameter specifies the operating frequency, storage place for
program data, programming destination address, and erase block and exchanges the processing
result for the downloaded on-chip program. This parameter uses the general registers of the CPU
(ER0 and ER1) or the on-chip RAM area. The initial value is undefined at a power-on reset or in
hardware standby mode.
When download, initialization, or on-chip program is executed, registers of the CPU except for
ER0 and ER1 are stored. The return value of the processing result is written in ER0, ER1. Since
the stack area is used for storing the registers except for ER0, ER1, the stack area must be saved at
the processing start. (A maximum size of a stack area to be used is 128 bytes.)
The programming/erasing interface parameter is used in the following four items.
1. Download control
2. Initialization before programming or erasing
3. Programming
4. Erasing
These items use different parameters. The correspondence table is shown in table 21.4. The
meaning of the bits in FPFR varies in each processing program: initialization, programming, or
erasure. For details, see descriptions of FPFR for each process.
Rev.7.00 Mar. 18, 2009 page 879 of 1136
REJ09B0109-0700

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