HD6412373R RENESAS [Renesas Technology Corp], HD6412373R Datasheet - Page 754

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HD6412373R

Manufacturer Part Number
HD6412373R
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 14 Watchdog Timer (WDT)
14.6.2
If a timer counter clock pulse is generated during the next cycle after the T
cycle, the write takes priority and the timer counter is not incremented. Figure 14.5 shows this
operation.
14.6.3
If bits CKS2 to CKS0 in TCSR are written to while the WDT is operating, errors could occur in
the incrementation. Software must stop the watchdog timer (by clearing the TME bit to 0) before
changing the value of bits CKS2 to CKS0.
14.6.4
If the mode is switched from watchdog timer to interval timer, while the WDT is operating, errors
could occur in the incrementation. Software must stop the watchdog timer (by clearing the TME
bit to 0) before switching the mode.
Rev.7.00 Mar. 18, 2009 page 686 of 1136
REJ09B0109-0700
φ
Address
Internal write signal
TCNT input clock
TCNT
Contention between Timer Counter (TCNT) Write and Increment
Changing Value of CKS2 to CKS0
Switching between Watchdog Timer Mode and Interval Timer Mode
Figure 14.5 Contention between TCNT Write and Increment
TCNT write cycle
T 1
T 2
Next cycle
N
Counter write data
M
2
state of a TCNT write

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