HD6412373R RENESAS [Renesas Technology Corp], HD6412373R Datasheet - Page 462

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HD6412373R

Manufacturer Part Number
HD6412373R
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 8 EXDMA Controller (EXDMAC)
Normal Transfer Mode (Burst Mode): Figure 8.16 shows an example of transfer when ETEND
output is enabled, and word-size, normal transfer mode (burst mode) is performed from external
16-bit, 2-state access space to external 16-bit, 2-state access space.
In burst mode, one-byte or one-word transfers are executed continuously until transfer ends.
Once burst transfer starts, requests from other channels, even of higher priority, are held pending
until transfer ends.
If an NMI interrupt is generated while a channel designated for burst transfer is enabled for
transfer, the EDA bit is cleared and transfer is disabled. If a block transfer has already been
initiated within the EXDMAC, the bus is released on completion of the currently executing byte or
word transfer, and burst transfer is aborted. If the last transfer cycle in burst transfer has been
initiated within the EXDMAC, transfer is executed to the end even if the EDA bit is cleared.
Rev.7.00 Mar. 18, 2009 page 394 of 1136
REJ09B0109-0700
φ
Address bus
RD
HWR
LWR
ETEND
Figure 8.16 Example of Normal Transfer Mode (Burst Mode) Transfer
Bus
release
DMA read
DMA write DMA read DMA write DMA read DMA write
Burst transfer
Last transfer cycle
Bus
release

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