HD6412373R RENESAS [Renesas Technology Corp], HD6412373R Datasheet - Page 952

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HD6412373R

Manufacturer Part Number
HD6412373R
Description
Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2300 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 21 Flash Memory (0.18-μm F-ZTAT Version)
(c) Flash pass/fail parameter (FPFR: general register R0L of CPU)
This parameter indicates the return value of the initialization result.
Bit
7 to 3
2
1
0
(3)
When flash memory is programmed, the programming destination address on the user MAT must
be passed to the programming program in which the program data is downloaded.
1. The start address of the programming destination on the user MAT must be stored in a general
2. The program data for the user MAT must be prepared in the consecutive area. The program
Rev.7.00 Mar. 18, 2009 page 884 of 1136
REJ09B0109-0700
register ER1. This parameter is called as FMPAR (flash multipurpose address area parameter).
Since the program data is always in units of 128 bytes, the lower eight bits (A7 to A0) must be
H'00 or H'80 as the boundary of the programming start address on the user MAT.
data must be in the consecutive space which can be accessed by using the MOV.B instruction
of the CPU and in other than the flash memory space.
Programming Execution
Bit
Name
BR
FQ
SF
Initial
Value
R/W
R/W
R/W
R/W
Description
Unused
Return 0
User Branch Error Detect (BR)
Returns the check result whether the specified user
branch destination address is in the area other than the
storage area of the programming/erasing program which
has been downloaded.
0: User branch address setting is normal
1: User branch address setting is abnormal
Frequency Error Detect
Returns the check result whether the specified operating
frequency of the CPU is in the range of the supported
operating frequency.
0: Setting of operating frequency is normal
1: Setting of operating frequency is abnormal
Success/Fail
Indicates whether initialization is completed normally.
0: Initialization is ended normally (no error)
1: Initialization is ended abnormally (error occurs)

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