MC908LJ12CFUE Freescale Semiconductor, MC908LJ12CFUE Datasheet - Page 157

• Manufacturer Part Number: MC908LJ12CFUE
• Description: IC MCU 12K FLASH 4/8MHZ 64-QFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908LJ12CFUE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: IRSCI, SPI
• Peripherals: LCD, LVD, POR, PWM
• Number Of I /o: 32
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-QFP
• Processor Series: HC08LJ
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68EML08LJLKE, ZK-HC08LX-A, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 6 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

10.4 Functional Description
MC68HC908LJ12
Freescale Semiconductor
—
Rev. 2.1
The monitor ROM receives and executes commands from a host
computer.
mode and communicate with a host computer via a standard RS-232
interface.
Simple monitor commands can access any memory address. In monitor
mode, the MCU can execute code downloaded into RAM by a host
computer while most MCU pins retain normal operating mode functions.
All communication between the host computer and the MCU is through
the PTA0 pin. A level-shifting and multiplexing interface is required
between PTA0 and the host computer. PTA0 is used in a wired-OR
configuration and requires a pullup resistor.
The monitor code allows enabling the PLL to generate the internal clock,
provided the reset vector is blank, when the device is being clocked by
a low-frequency crystal. This entry method, which is enabled when IRQ
is held low out of reset, is intended to support serial communication/
programming at 9600 baud in monitor mode by stepping up the external
frequency (assumed to be 32.768 kHz) by a fixed amount to generate
the desired internal frequency (2.4576 MHz). Since this feature is
enabled only when IRQ is held low out of reset, it cannot be used when
the reset vector is non-zero because entry into monitor mode in this case
requires V
TST
Figure 10-1
on IRQ.
Monitor ROM (MON)
shows an example circuit used to enter monitor
Monitor ROM (MON)
Technical Data
157