MC908LJ12CFUE Freescale Semiconductor, MC908LJ12CFUE Datasheet - Page 271

IC MCU 12K FLASH 4/8MHZ 64-QFP

MC908LJ12CFUE

Manufacturer Part Number
MC908LJ12CFUE
Description
IC MCU 12K FLASH 4/8MHZ 64-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908LJ12CFUE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
IRSCI, SPI
Peripherals
LCD, LVD, POR, PWM
Number Of I /o
32
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-QFP
Processor Series
HC08LJ
Core
HC08
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
32
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68EML08LJLKE, ZK-HC08LX-A, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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14.4 Pin Name Conventions and I/O Register Addresses
14.5 Functional Description
MC68HC908LJ12
Freescale Semiconductor
Addr.
$0010
$0011
$0012
SPI Status and Control
Register Name
SPI Control Register
SPI Data Register
Rev. 2.1
(SPSCR)
Register
(SPCR)
(SPDR)
The text that follows describes the SPI. The SPI I/O pin names are SS
(slave select), SPSCK (SPI serial clock), CGND (clock ground), MOSI
(master out slave in), and MISO (master in/slave out). The SPI shares
four I/O pins with four parallel I/O ports.
The full names of the SPI I/O pins are shown in
pin names appear in the text that follows.
Figure 14-1
Figure 14-2
=
Pin Names: SPI PTD1/MISO PTD2/MOSI PTD0/SS PTD3/SPSCK
Reset:
Reset:
Reset:
Read:
Read:
Read:
Write:
Write:
Write:
Full SPI
SPI Generic
Figure 14-1. SPI I/O Register Summary
Pin Names:
Serial Peripheral Interface Module (SPI)
SPRIE
SPRF
Bit 7
R7
T7
0
0
summarizes the SPI I/O registers.
shows the structure of the SPI module.
= Unimplemented
ERRIE
Table 14-1. Pin Name Conventions
R6
T6
R
6
0
0
MISO
SPMSTR
OVRF
R5
T5
5
1
0
Unaffected by reset
MOSI
MODF
CPOL
R4
T4
4
0
0
Serial Peripheral Interface Module (SPI)
CPHA
SPTE
R3
T3
R
3
1
1
SS
Table
= Reserved
SPWOM
MODFEN
R2
T2
2
0
0
14-1. The generic
SPSCK
SPR1
SPE
R1
T1
1
0
0
Technical Data
CGND
SPTIE
SPR0
Bit 0
V
R0
T0
0
0
SS
271

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