MC908LJ12CFUE Freescale Semiconductor, MC908LJ12CFUE Datasheet - Page 62

IC MCU 12K FLASH 4/8MHZ 64-QFP

MC908LJ12CFUE

Manufacturer Part Number
MC908LJ12CFUE
Description
IC MCU 12K FLASH 4/8MHZ 64-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908LJ12CFUE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
IRSCI, SPI
Peripherals
LCD, LVD, POR, PWM
Number Of I /o
32
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-QFP
Processor Series
HC08LJ
Core
HC08
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
32
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68EML08LJLKE, ZK-HC08LX-A, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Price
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MC908LJ12CFUE
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Freescale Semiconductor
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FLASH Memory (FLASH)
4.3 Functional Description
Technical Data
62
Addr.
$FE08
$FE09
FLASH Control Register
FLASH Block Protect
Register Name
NOTE:
(FLBPR)
Register
(FLCR)
The FLASH memory consists of an array of 12,288 bytes for user
memory plus a block of 48 bytes for user interrupt vectors. An erased bit
reads as logic 1 and a programmed bit reads as a logic 0. The FLASH
memory page size is defined as 128 bytes, and is the minimum size that
can be erased in a page erase operation. Program and erase operations
are facilitated through control bits in FLASH control register (FLCR). The
address ranges for the FLASH memory are:
Programming tools are available from Freescale. Contact your local
Freescale representative for more information.
A security feature prevents viewing of the FLASH contents.
1. No security feature is absolutely secure. However, Freescale’s strategy is to make reading or
copying the FLASH difficult for unauthorized users.
Reset:
Reset:
Read:
Read:
Write:
Write:
Figure 4-1. FLASH I/O Register Summary
$C000–$EFFF; user memory; 12,288 bytes
$FFD0–$FFFF; user interrupt vectors; 48 bytes
BPR7
Bit 7
0
0
0
FLASH Memory (FLASH)
= Unimplemented
BPR6
6
0
0
0
BPR5
5
0
0
0
BPR4
4
0
0
0
HVEN
BPR3
3
0
0
MC68HC908LJ12
MASS
BPR2
Freescale Semiconductor
0
0
2
ERASE
BPR1
1
0
0
1
Rev. 2.1
BPR0
Bit 0
PGM
0
0

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