MC908LJ12CFUE Freescale Semiconductor, MC908LJ12CFUE Datasheet - Page 218

IC MCU 12K FLASH 4/8MHZ 64-QFP

MC908LJ12CFUE

Manufacturer Part Number
MC908LJ12CFUE
Description
IC MCU 12K FLASH 4/8MHZ 64-QFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC908LJ12CFUE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
IRSCI, SPI
Peripherals
LCD, LVD, POR, PWM
Number Of I /o
32
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-QFP
Processor Series
HC08LJ
Core
HC08
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
32
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68EML08LJLKE, ZK-HC08LX-A, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Real Time Clock (RTC)
12.6.2 RTC Control Register 2 (RTCCR2)
Technical Data
218
Address:
The RTC control register 2 (RTCCR2) contains control and clock
selection bits for RTC operation.
CHRCLR — Chronograph counter clear
CHRE — Chronograph Enable
RTCE — Real Time Clock Enable
Reset:
Read:
Write:
Setting this write-only bit resets the chronograph counter. Setting
CHRCLR has no effect on any other registers. Counting resumes
from $00. CHRCLR is cleared automatically after the chronograph
counter is reset and always reads as logic 0. Reset clears the
CHRCLR bit.
This read/write bit enables the chronograph counter, the value in the
chronograph data register increments by 1 in every 1/100 seconds.
When the chronograph counter is disabled (CHRE = 0), the value in
the chronograph data register is held at the count value. Reset clears
the CHRE bit.
This read/write bit enables the entire RTC module, allowing all RTC
and chronograph operations. Disabling the RTC module does not
affect the contents in the RTC registers. Reset clears the RTCE bit.
1 = Chronograph counter cleared
0 = No effect
1 = Chronograph counter enabled
0 = Chronograph counter disabled
1 = RTC module enabled
0 = RTC module disabled
$0043
R
0
0
Figure 12-4. RTC Control Register 2 (RTCCR2)
Real Time Clock (RTC)
CHRCLR
= Unimplemented
0
0
CHRE
0
RTCE
0
R
0
0
MC68HC908LJ12
= Reserved
XTL2
Freescale Semiconductor
0
XTL1
0
Rev. 2.1
XTL0
0

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